8-Bit, 80MHz Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

q HIGH SNR: 49dB

q INTERNAL / EXTERNAL REFERENCE

OPTION

q SINGLE-ENDED OR

DIFFERENTIAL ANALOG INPUT

q PROGRAMMABLE INPUT RANGE:

1Vp-p /2Vp-p

q LOW POWER: 275mW

q LOW DNL: 0.35LSB

q SINGLE +5V SUPPLY OPERATION

q 20-PIN SSOP PACKAGE

APPLICATIONS

q MEDICAL IMAGING

q VIDEO DIGITIZING

q COMPUTER SCANNERS

q COMMUNICATIONS

q DISK-DRIVE CONTROL

DESCRIPTION

The ADS831 is a pipeline, CMOS analog-to-digital con-

verter that operates from a single +5V power supply. This

converter provides excellent performance with a single-

ended input and can be operated with a differential input

for added spurious performance. This high performance

converter includes an 8-bit quantizer, high bandwidth

track/hold, and a high accuracy internal reference. It also

allows for the user to disable the internal reference and

utilize external references. This external reference option

provides excellent gain and offset matching when used in

multi-channel applications or in applications where DC full

scale range adjustment is required.

The ADS831 employs digital error correction techniques to

provide excellent differential linearity for demanding im-

aging applications. Its low distortion and high SNR give

the extra margin needed for medical imaging, communica-

tions, video, and test instrumentation.

The ADS831 is specified at a maximum sampling fre-

quency of 80MHz and a single-ended input range of 1.5V

to 3.5V. The ADS831 is available in a 20-lead SSOP

package and is pin-for-pin compatible with the 8-bit, 60MHz

ADS830.

TM

ADS831

®

¤

ADS831

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

PDS-1430B

Printed in U.S.A. October, 1998

8-Bit

Pipelined

A/D Core

Internal

Reference

Optional External

Reference

Timing

Circuitry

Error

Correction

Logic

3-State

Outputs

T/H

CLK

VDRV

ADS831

+V

S

Int/Ext

D0

D7

•

•

•

IN

V

IN

IN

(Opt)