®

7

ADS7843

FIGURE 2. Simplified Diagram of Analog Input.

REFERENCE INPUT

The voltage difference between +REF and –REF (see Figure

2) sets the analog input range. The ADS7843 will operate

critical items concerning the reference input and its wide

voltage range. As the reference voltage is reduced, the analog

voltage weight of each digital output code is also reduced.

This is often referred to as the LSB (least significant bit) size

and is equal to the reference voltage divided by 4096. Any

offset or gain error inherent in the A/D converter will appear

to increase, in terms of LSB size, as the reference voltage is

reduced. For example, if the offset of a given converter is 2

LSBs with a 2.5V reference, it will typically be 5 LSBs with

a 1V reference. In each case, the actual offset of the device

is the same, 1.22mV. With a lower reference voltage, more

care must be taken to provide a clean layout including

adequate bypassing, a clean (low noise, low ripple) power

supply, a low-noise reference, and a low-noise input signal.

drives the capacitor digital-to-analog converter (CDAC) por-

tion of the ADS7843. Typically, the input current is 13

µA

by a few microamps depending on the result of the conver-

sion. The reference current diminishes directly with both

conversion rate and reference voltage. As the current from the

reference is drawn on each bit decision, clocking the con-

verter more quickly during a given conversion period will not

reduce overall current drain from the reference.

There is also a critical item regarding the reference when

making measurements where the switch drivers are on. For

this discussion, it’s useful to consider the basic operation of

the ADS7843 as shown in Figure 1. This particular appli-

cation shows the device being used to digitize a resistive

touch screen. A measurement of the current Y position of

the pointing device is made by connecting the X+ input to

the A/D converter, turning on the Y+ and Y– drivers, and

digitizing the voltage on X+ (see Figure 3 for a block

diagram). For this measurement, the resistance in the X+

lead does not affect the conversion (it does affect the

settling time, but the resistance is usually small enough that

this is not a concern).

FIGURE 3. Simplified Diagram of Single-Ended Reference

(SER/DFR HIGH, Y Switches Enabled, X+ is

Analog Input).

Converter

+IN

+REF

Y+

+V

CC

V

REF

X+

Y–

GND

–REF

–IN

CONVERTER

+REF

+IN

IN3

IN4

GND

A2-A0

(Shown 001

SER/DFR

(Shown HIGH)

X+

X–

+V

CC

PENIRQ

Y+

Y–

V

REF