8

®

ADS7824

STARTING A CONVERSION

The combination of CS (pin 23) and R/C (pin 22) LOW for

a minimum of 40ns places the sample/hold of the ADS7824

in the hold state and starts conversion ‘n’. BUSY (pin 24)

will go LOW and stay LOW until conversion ‘n’ is com-

pleted and the internal output register has been updated. All

new convert commands during BUSY LOW will be ignored.

CS and/or R/C must go HIGH before BUSY goes HIGH or

a new conversion will be initiated without sufficient time to

acquire a new signal.

The ADS7824 will begin tracking the input signal at the end

of the conversion. Allowing 25

µs between convert com-

mands assures accurate acquisition of a new signal. Refer to

Tables Ia and Ib for a summary of CS, R/C, and BUSY states

and Figures 2 through 6 and Table II for timing information.

CS and R/C are internally OR’d and level triggered. There

is not a requirement which input goes LOW first when

initiating a conversion. If, however, it is critical that CS or

R/C initiates conversion ‘n’, be sure the less critical input is

LOW at least 10ns prior to the initiating input. If EXT/INT

(pin 12) is LOW when initiating conversion ‘n’, serial data

from conversion ‘n – 1’ will be output on SDATA (pin 16)

following the start of conversion ‘n’. See Internal Data

Clock in the Reading Data section.

To reduce the number of control pins, CS can be tied LOW

using R/C to control the read and convert modes. This will

have no effect when using the internal data clock in the serial

output mode. However, the parallel output and the serial

output (only when using an external data clock) will be

affected whenever R/C goes HIGH. Refer to the Reading

Data section and Figures 2, 3, 5, and 6.

D7, D6, D5

D4

D3

D2

D1

D0

CS

R/C

CONTC PWRD

BUSY

LOW

EXT/INT

SYNC

DATACLK

SDATA

TAG

Input

Input

Input

Input

Output

Output

Input

Output

I/O

Output

Input

COMMENTS

1

X

X

X

1

Hi-Z

LOW

LOW

Output

Hi-Z

X

X

0

X

X

1

Hi-Z

LOW

LOW

Output

Hi-Z

X

0

↓

0

X

1

Hi-Z

LOW

LOW

Output

Output

X

Starts transmission of data from previous

conversion on SDATA synchronized to 12

pulses output on DATACLK.

↓

0

0

X

1

Hi-Z

LOW

LOW

Output

Output

X

Starts transmission of data from previous

conversion on SDATA synchronized to 12

pulses output on DATACLK.

0

1

0

X

X

Hi-Z

HIGH

LOW

Input

Output

Input

The level output on SDATA will be the level

input on TAG 12 DATACLK input cycles

earlier.

0

10X

↑

Hi-Z

HIGH

LOW

Input

Output

Input

At the end of the conversion, when BUSY

rises, data from the conversion will be shifted

into the output registers. If DATACLK is HIGH,

valid data will be lost.

0

↑

0

X

1

Hi-Z

HIGH

LOW

Input

Output

X

Initiates transmission of a HIGH pulse on

SYNC followed by data from last completed

conversion on SDATA synchronized to the

input on DATACLK.

↓

1

0

X

1

Hi-Z

HIGH

LOW

Input

Output

X

Initiates transmission of a HIGH pulse on

SYNC followed by data from last completed

conversion on SDATA synchronized to the

input on DATACLK.

00

1

0

↓

Hi-Z

LOW

LOW

Output

Output

X

Starts transmission of data from previous

conversion on SDATA synchronized to 12

pulses output on DATACLK

↓

1

X

X

X

Hi-Z

HIGH

Output

Input

Output

X

SDATA becomes active. Inputs on DATACLK

shift out data.

0

↑

X

X

X

Hi-Z

HIGH

Output

Input

Output

X

SDATA becomes active. Inputs on DATACLK

shift out data.

↓

0

1

X

X

Hi-Z

LOW

LOW

Output

Output

X

Restarts continuous conversion mode (n – 1 data

transmitted when BUSY is LOW).

0

↓

1

X

X

Hi-Z

LOW

LOW

Output

Output

X

Restarts continuous conversion mode (n – 1 data

transmitted when BUSY is LOW).

INPUTS

OUTPUTS

CS

R/C

BYTE

CONTC

PWRD

BUSY

D7

D6

D5

D4

D3

D2

D1

D0

COMMENTS

1

X

X

X

X

X

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

X

0

X

X

X

X

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

0

1

0

X

X

X

D11

D10

D9

D8

D7

D6

D5

D4

Results from last

(MSB)

completed conversion.

0

1

1

X

X

X

D3

D2

D1

D0

LOW

LOW

LOW

LOW

Results from last

(LSB)

completed conversion.

01

XX

X

↑

↑↓

↑↓

↑↓↑↓↑↓

↑↓↑↓↑↓

Data will change at the

end of a conversion.

TABLE Ia. Read Control for Parallel Data (PAR/SER = 5V.)

TABLE Ib. Read Control for Serial Data (PAR/SER = 0V.)