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ADS1250 Datasheet(PDF) 2 Page - Burr-Brown (TI) |
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ADS1250 Datasheet(HTML) 2 Page - Burr-Brown (TI) |
2 / 20 page 2 ADS1250 ® SPECIFICATIONS All specifications at TMIN to TMAX, VD = VS = +5V, CLK = 9.6MHz, PGA = 1, and VREF = 4.096, unless otherwise specified. ADS1250U PARAMETER CONDITIONS MIN TYP MAX UNITS ANALOG INPUT Input Voltage Range(1) G = Gain AGND ±V REF/G V Programmable Gain Amplifier 1 8 Input Impedance (differential) G = Gain 104/G k Ω Input Capacitance G = Gain 6 • G pF Input Leakage At +25 °C5 50 pA At TMIN to TMAX 1nA DYNAMIC CHARACTERISTICS Data Rate 25 kHz Bandwidth 3dB 5.4 kHz Serial Clock (SCLK) 9.6 MHz System Clock Input (CLK) 9.6 MHz ACCURACY Integral Linearity Error(2) ±0.0012 ±0.0020 % of FSR THD 1kHz Input; 0.1dB below FS 97 dB Noise 2.8 3.8 ppm of FSR, rms Resolution 20 Bits No Missing Codes 20 Bits Common-Mode Rejection(3) at DC 90 105 dB Gain Error 1 % of FSR Offset Error ±100 ±200 ppm of FSR Gain Sensitivity to VREF VREF = 4.096V ±0.1V 1:1 Power Supply Rejection Ratio 60 78 dB PERFORMANCE OVER TEMPERATURE Offset Drift 0.25 ppm/ °C Gain Drift 5.0 ppm/ °C VOLTAGE REFERENCE VREF 3.996V 4.096 4.196 V Load Current 125 µA DIGITAL INPUT/OUTPUT Logic Family CMOS Logic Level: VIH +4.0 +VD + 0.3 V VIL –0.3 +0.8 V VOH IOH = –500µA +4.5 V VOL IOL = 500µA 0.4 V Data Format Binary Two’s Complement POWER SUPPLY REQUIREMENTS Operation +4.75 +5 +5.25 VDC Quiescent Current, Analog V = +5VDC 14 mA Quiescent Current, Digital V = +5VDC 1 mA Operating Power 75 100 mW TEMPERATURE RANGE Operating –40 +85 °C Storage –60 +100 °C NOTES: (1) In order to achieve the converter’s full-scale range, the input must be fully differential. If the input is single-ended (+VIN or –VIN is fixed), then the full-scale range is one-half that of the differential range. (2) Applies to full-differential signals. (3) The common-mode rejection test is performed with a 100mV differential input. |
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