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BS616UV2011 Datasheet(PDF) 4 Page - Brilliance Semiconductor |
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BS616UV2011 Datasheet(HTML) 4 Page - Brilliance Semiconductor |
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4 / 11 page  R0201-BS616UV2011 Revision 2.5 April 2002 4 JEDEC PARAMETER NAME PARAMETER NAME DESCRIPTION BS616UV2011-70 MIN. TYP. MAX. BS616UV2011-10 MIN. TYP. MAX. UNIT t AVAX t RC Read Cycle Time 70 -- -- 100 -- -- ns t AVQV t AA Address Access Time -- -- 70 -- -- 100 ns t ELQV t ACS Chip Select Access Time (CE) -- -- 70 -- -- 100 ns t BA t BA Data Byte Control Access Time (LB,U ) - B - -- 35 -- -- 50 ns t GLQV t OE Output Enable to Output Valid -- -- 35 -- -- 50 ns t ELQX t CLZ Chip Select to Output Low Z (CE) 10 -- -- 15 -- -- ns t BE t BE Data Byte Control to Output Low Z (LB,UB) 10 -- -- 15 -- -- ns t GLQX t OLZ Output Enable to Output in Low Z 10 -- -- 15 -- -- ns t EHQZ t CHZ Chip Deselect to Output in High Z (CE) 0 -- 35 0 -- 40 ns t BDO t BDO Data Byte Control to Output High Z (LB,UB) 0 -- 35 0 -- 40 ns t GHQZ t OHZ Output Disable to Output in High Z 0-- 30 0 -- 35 ns t AXOX t OH Output Disable to Address Change 10 -- -- 15 -- -- ns Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Vcc/0V 5ns 0.5Vcc AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc = 2.0V ) READ CYCLE AC TEST CONDITIONS AC TEST LOADS AND WAVEFORMS KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS MUST BE STEADY MAY CHANGE FROM H TO L DON T CAR ANY CHANG PERMITTED E: CHANGE : E STATE DOES NOT APPLY MUST BE STEADY WILL BE CHANGE FROM H TO L UNKNOWN CENTER LINE IS HIGH IMPEDANCE ”OFF ”STATE MAY CHANGE FROM L TO H WILL BE CHANGE FROM L TO H , LOW V CC DATA RETENTION WAVEFORM ( CE Controlled ) CE Data Retention Mode Vcc t CDR Vcc t R VIH VIH Vcc VDR 1.5V ≥ CE Vcc - 0.2V ≥ BSI BS616UV2011 Ω 800 THEVENIN EQUIVALENT ALL INPUT PULSES → 10% ← 90% Vcc GND → ← 5ns 90% 10% 1.2V OUTPUT FIGURE 2 2V OUTPUT INCLUDING JIG AND SCOPE Ω 1333 Ω 2000 5PF FIGURE 1B 2V OUTPUT INCLUDING JIG AND SCOPE Ω 1333 Ω 100PF FIGURE 1A 2000 1. tBA is 35ns/50ns (@speed=70ns/100ns) with address toggle. ; .tBA is 70ns/100ns (@speed=70ns/100ns) without address toggle. NOTE : (1) |
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