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BS616LV4020 Datasheet(PDF) 6 Page - Brilliance Semiconductor

Part # BS616LV4020
Description  Very Low Power/Voltage CMOS SRAM 256K x 16 or 512K x 8 bit switchable
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Manufacturer  BSI [Brilliance Semiconductor]
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Logo BSI - Brilliance Semiconductor

BS616LV4020 Datasheet(HTML) 6 Page - Brilliance Semiconductor

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Revision 2.3
April 2002
6
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
AC ELECTRICAL CHARACTERISTICS (TA = 0oC to +70oC , Vcc=3.0V)
READ CYCLE
AC TEST CONDITIONS
AC TEST LOADS AND WAVEFORMS
Ω
667
THEVENIN EQUIVALENT
ALL INPUT PULSES
→
10%
90%
←
Vcc
GND
→
← 5ns
90%
10%
1.73V
OUTPUT
FIGURE 2
3.3V
OUTPUT
INCLUDING
JIG AND
SCOPE
Ω
1269
Ω
1404
5PF
FIGURE 1B
3.3V
OUTPUT
INCLUDING
JIG AND
SCOPE
Ω
1269
Ω
100PF
FIGURE 1A
1404
BSI
BS616LV4020
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
,
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS616LV4020-70
MIN. TYP. MAX.
UNIT
Data Byte Control to Output High Z
Read Cycle Time
t
AVAX
t
AVQV
t
E1LQV
t
GLQV
t
BE
t
E1HQZ
t
GHQZ
t
BDO
t
GLQX
t
E1LQX
t
BA
t
RC
t
AA
t
ACS1
t
BA
t
OE
t
CLZ
t
BE
t
OLZ
t
CHZ
t
BDO
t
OHZ
t
OH
Address Access Time
Chip Select Access Time
Data Byte Control Access Time
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
Output Disable to Output Address Change
Data Byte Control to Output Low Z
70
10
10
10
0
0
0
10
t
AXQX
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Output Enable to Output Valid
(CE1)
(CE2,CE1)
70
70
70
35
35
35
35
30
BS616LV4020-10
MIN. TYP. MAX.
100
15
15
15
0
0
0
15
100
100
100
50
50
40
40
35
(CE2,CE1)
ns
t
E2LQV
t
ACS2
(CE2)
Chip Select Access Time
(LB,UB)
(LB,UB)
(LB,UB)
R0201-BS616LV4020
(1)
1. tBA is 35ns/50ns (@speed=70ns/100ns) with address toggle .
tBA is 70ns/100ns (@speed=70ns/100ns) without address toggle .
NOTE :


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