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UCC3817 Datasheet(PDF) 5 Page - Texas Instruments

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Part # UCC3817
Description  BCMOS POWER FACTOR PREREGULATOR
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

UCC3817 Datasheet(HTML) 5 Page - Texas Instruments

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UCC2817, UCC2818, UCC3817, UCC3818
BiCMOS POWER FACTOR PREREGULATOR
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009
5
www.ti.com
electrical characteristics, TA = 0°C to 70°C for the UCC3817 and TA = −40°C to 85°C for the UCC2817, TA
= TJ, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted)
feed-forward section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VFF output current
IAC = 300 µA
−140
−150
−160
µA
soft start section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SS charge current
−6
−10
−16
µA
gate driver section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Pullup resistance
IO = –100 mA to −200 mA
5
12
Pulldown resistance
IO = 100 mA
2
10
Output rise time
CL = 1 nF,
RL = 10 Ω,
VDRVOUT = 0.7 V to 9.0 V
25
50
ns
Output fall time
CL = 1 nF,
RL = 10 Ω,
VDRVOUT = 9.0 V to 0.7 V
10
50
ns
Maximum duty cycle
93
95
99
%
Minimum controlled duty cycle
At 100 kHz
2
%
zero power section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Zero power comparator threshold
Measured on VAOUT
0.20
0.33
0.50
V
pin descriptions
CAI: (current amplifier noninverting input) Place a resistor between this pin and the GND side of current sense
resistor. This input and the inverting input (MOUT) remain functional down to and below GND.
CAOUT: (current amplifier output) This is the output of a wide bandwidth operational amplifier that senses line
current and commands the PFC pulse-width modulator (PWM) to force the correct duty cycle. Compensation
components are placed between CAOUT and MOUT.
CT: (oscillator timing capacitor) A capacitor from CT to GND sets the PWM oscillator frequency according to:
f
[
0.6
RT
CT
The lead from the oscillator timing capacitor to GND should be as short and direct as possible.
DRVOUT: (gate drive) The output drive for the boost switch is a totem-pole MOSFET gate driver on DRVOUT.
Use a series gate resistor to prevent interaction between the gate impedance and the output driver that might
cause the DRVOUT to overshoot excessively. See characteristic curve (Figure 13) to determine minimum
required gate resister value. Some overshoot of the DRVOUT output is always expected when driving a
capacitive load.
GND: (ground) All voltages measured with respect to ground. VCC and REF should be bypassed directly to
GND with a 0.1-
µF or larger ceramic capacitor.


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