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DP83630SQE Datasheet(PDF) 9 Page - Texas Instruments |
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DP83630SQE Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 135 page  DP83630 www.ti.com SNLS335B – OCTOBER 2010 – REVISED APRIL 2013 The device supports up to 8 trigger signals which can be output on any of the GPIO signal pins. Multiple triggers may be assigned to a single GPIO, allowing generation of more complex waveforms (i.e. a sequence of varying width pulses). The trigger signals are OR’ed together to form a combined signal. The triggers are configured through the PTP Trigger Configuration Registers. The trigger time and width settings are controlled through the PTP Control and Time Data registers. The DP83630 can be programmed to output a Pulse-Per-Second (PPS) signal using the trigger functions. 2.3.3.2 IEEE 1588 Event Timestamping The DP83630 can be programmed to timestamp an event by monitoring an input signal. The event can be monitored for rising edge, falling edge, or either. The Event Timestamp Unit can monitor up to eight events which can be set to any of the GPIO signal pins. PTP event timestamps are stored in a queue which allows storage of up to eight timestamps. When an event timestamp is available, the device will set the EVENT_RDY bit in the PTP Status Register. The PTP Event Status Register (PTP_ESTS) provides detailed information on the next available event timestamp, including information on the event number, rise/fall direction, and indication of events missed due to overflow of the devices Event queue. Event timestamp values should be adjusted by 35 ns (3 times period of the IEEE 1588 reference clock frequency of 125 MHz + 11 ns) to compensate for input path and synchronization delays. The Event Timestamp Unit is configured through the PTP Event Configuration Register (PTP_EVNT). 2.3.4 PTP INTERRUPTS The PTP module may interrupt the system using the PWRDOWN/INTN pin on the device, shared with other interrupts from the PHY. As an alternative, the device may be programmed to use a GPIO pin to generate PTP interrupts separate from other PHY interrupts. 2.3.5 GPIO The DP83630 features 12 IEEE 1588 GPIO pins. These GPIO pins allow for event monitoring, triggering, interrupts, and a clock output. The LED pins comprise 3 of the 12 GPIO pins. If an LED pin is to be used as a GPIO, its LED function must be disabled prior to configuring the GPIO function. Copyright © 2010–2013, Texas Instruments Incorporated Device Information 9 Submit Documentation Feedback Product Folder Links: DP83630 |
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