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AT32UC3L0256-ZAUR Datasheet(PDF) 9 Page - ATMEL Corporation |
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AT32UC3L0256-ZAUR Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 96 page  9 32145BS–01/2012 AT32UC3L0128/256 13 PA02 2 VDDIO High- drive I/O USART0 RTS ADCIFB TRIGGER USART2 TXD TC0 A0 PWMA PWMA[2] ACIFB ACBP[0] USART0 CLK CAT CSA[3] 4 PA03 3 VDDIO Normal I/O USART0 CTS SPI NPCS[1] USART2 TXD TC0 B0 PWMA PWMA[3] ACIFB ACBN[3] USART0 CLK CAT CSB[3] 28 PA04 4 VDDIO Normal I/O SPI MISO TWIMS0 TWCK USART1 RXD TC0 B1 PWMA PWMA[4] ACIFB ACBP[1] CAT CSA[7] 12 PA05 5 VDDIO Normal I/O (TWI) SPI MOSI TWIMS1 TWCK USART1 TXD TC0 A1 PWMA PWMA[5] ACIFB ACBN[0] TWIMS0 TWD CAT CSB[7] 10 PA06 6 VDDIO High- drive I/O, 5V tolerant SPI SCK USART2 TXD USART1 CLK TC0 B0 PWMA PWMA[6] EIC EXTINT[2] SCIF GCLK[1] CAT CSB[1] 15 PA07 7 VDDIO Normal I/O (TWI) SPI NPCS[0] USART2 RXD TWIMS1 TWALM TWIMS0 TWCK PWMA PWMA[7] ACIFB ACAN[0] EIC NMI (EXTINT[0]) CAT CSB[2] 3 PA08 8 VDDIO High- drive I/O USART1 TXD SPI NPCS[2] TC0 A2 ADCIFB ADP[0] PWMA PWMA[8] CAT CSA[4] 2 PA09 9 VDDIO High- drive I/O USART1 RXD SPI NPCS[3] TC0 B2 ADCIFB ADP[1] PWMA PWMA[9] SCIF GCLK[2] EIC EXTINT[1] CAT CSB[4] 46 PA10 10 VDDIO Normal I/O TWIMS0 TWD TC0 A0 PWMA PWMA[10] ACIFB ACAP[1] SCIF GCLK[2] CAT CSA[5] 27 PA11 11 VDDIN Normal I/O PWMA PWMA[11] 47 PA12 12 VDDIO Normal I/O USART2 CLK TC0 CLK1 CAT SMP PWMA PWMA[12] ACIFB ACAN[1] SCIF GCLK[3] CAT CSB[5] 26 PA13 13 VDDIN Normal I/O GLOC OUT[0] GLOC IN[7] TC0 A0 SCIF GCLK[2] PWMA PWMA[13] CAT SMP EIC EXTINT[2] CAT CSA[0] 36 PA14 14 VDDIO Normal I/O ADCIFB AD[0] TC0 CLK2 USART2 RTS CAT SMP PWMA PWMA[14] SCIF GCLK[4] CAT CSA[6] 37 PA15 15 VDDIO Normal I/O ADCIFB AD[1] TC0 CLK1 GLOC IN[6] PWMA PWMA[15] CAT SYNC EIC EXTINT[3] CAT CSB[6] 38 PA16 16 VDDIO Normal I/O ADCIFB AD[2] TC0 CLK0 GLOC IN[5] PWMA PWMA[16] ACIFB ACREFN EIC EXTINT[4] CAT CSA[8] 39 PA17 17 VDDIO Normal I/O (TWI) TC0 A1 USART2 CTS TWIMS1 TWD PWMA PWMA[17] CAT SMP CAT DIS CAT CSB[8] 41 PA18 18 VDDIO Normal I/O ADCIFB AD[4] TC0 B1 GLOC IN[4] PWMA PWMA[18] CAT SYNC EIC EXTINT[5] CAT CSB[0] 40 PA19 19 VDDIO Normal I/O ADCIFB AD[5] TC0 A2 TWIMS1 TWALM PWMA PWMA[19] SCIF GCLK_IN[0] CAT SYNC CAT CSA[10] 25 PA20 20 VDDIN Normal I/O USART2 TXD TC0 A1 GLOC IN[3] PWMA PWMA[20] SCIF RC32OUT CAT CSA[12] 24 PA21 21 VDDIN Normal I/O (TWI, 5V tolerant, SMBus) USART2 RXD TWIMS0 TWD TC0 B1 ADCIFB TRIGGER PWMA PWMA[21] PWMA PWMAOD[21] SCIF GCLK[0] CAT SMP 9 PA22 22 VDDIO Normal I/O USART0 CTS USART2 CLK TC0 B2 CAT SMP PWMA PWMA[22] ACIFB ACBN[2] CAT CSB[10] 6 PB00 32 VDDIO Normal I/O USART3 TXD ADCIFB ADP[0] SPI NPCS[0] TC0 A1 PWMA PWMA[23] ACIFB ACAP[2] TC1 A0 CAT CSA[9] 16 PB01 33 VDDIO High- drive I/O USART3 RXD ADCIFB ADP[1] SPI SCK TC0 B1 PWMA PWMA[24] TC1 A1 CAT CSB[9] 7 PB02 34 VDDIO Normal I/O USART3 RTS USART3 CLK SPI MISO TC0 A2 PWMA PWMA[25] ACIFB ACAN[2] SCIF GCLK[1] CAT CSB[11] Table 3-1. GPIO Controller Function Multiplexing |
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