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TS68C429AMF Datasheet(PDF) 7 Page - ATMEL Corporation |
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TS68C429AMF Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 43 page 7 TS68C429A 2120A–HIREL–08/02 Design and Construction Terminal Connections Depending on the package, the terminal connections is detailed in “Terminal Connec- tions” on page 41. Package The circuits are packaged in a hermetically sealed ceramic package which is conform to case outlines of MIL-STD 1835 (when defined): • PGA 84, • CQFP 132. The precise case outlines are described at the end of this specification (“Package Mechanical Data” on page 40) and into MIL-STD-1835. Special Recommended Conditions for CMOS Devices • CMOS Latch-up The CMOS cell is basically composed of two complementary transistors (a P-channel and an N-channel), and, in the steady state, only one transistor is turned-on. The active P-channel transistor sources current when the output is a logic high and presents a high impedance when the output is a logic low. Thus the overall result is extremely low power consumption because there is no power loss through the active P-channel transistor. Also since only once transistor is determined by leakage currents. Because the basic CMOS cell is composed of two complementary transistors, a para- sitic semiconductor controlled rectifier (SCR) formed and may be triggered when an input exceeds the supply voltage. The SCR that is formed by this high input causes the device to become “latched” in a mode that may result in excessive current drain and eventual destruction of the device. Although the device is implemented with input pro- tection diodes, care should be exercised to ensure that the maximum input voltages specification is not exceeded from voltage transients; others may require no additional circuitry. • CMOS/TTL Levels The TS68C429A doesn’t satisfy totally the input/output drive requirements of TTL logic devices, see Table 4. Electrical Characteristics Table 1. Absolute Maximum Ratings Symbol Parameter Test Conditions Min Max Unit V CC Supply Voltage -0.3 +7.0 V V I Input Voltage -0.3 +7.0 V P dmax Max Power Dissipation 400 mW T case Operating Temperature M suffix -55 +125 °C V suffix -40 +85 °C T stg Storage Temperature -55 +150 °C T j Junction Temperature +160 °C T leads Lead Temperature Max 5 sec. soldering +270 °C |
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