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ATMEGA103-6AI Datasheet(PDF) 1 Page - ATMEL Corporation |
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ATMEGA103-6AI Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 10 page 1 Features • Utilizes the AVR® Enhanced RISC Architecture • 121 Powerful Instructions - Most Single Clock Cycle Execution • 128K bytes of In-System Reprogrammable Flash ATmega103/L 64K bytes of In-System Reprogrammable Flash ATmega603/L – SPI Interface for In-System Programming – Endurance: 1,000 Write/Erase Cycles • 4K bytes EEPROM ATmega103/L 2K bytes of EEPROM ATmega603/L – Endurance: 100,000 Write/Erase Cycles • 4K bytes Internal SRAM • 32 x 8 General Purpose Working Registers + Peripheral Control Registers • 32 Programmable I/O Lines, 8 Output Lines, 8 Input Lines • Programmable Serial UART + SPI Serial Interface • V CC Supply – 2.7 - 3.6V ATmega603L/ATmega103L – 4.0 - 5.5V ATmega603/ATmega103 • Fully Static Operation – 0 - 6 MHz ATmega603/ATmega103 – 0 - 4 MHz ATmega603L/ATmega103L • Up to 6 MIPS Throughput at 6 MHz • RTC with Separate Oscillator • Two 8-Bit Timer/Counters with Separate Prescaler and PWM • One 16-Bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and Dual 8-, 9- or 10-Bit PWM • Programmable Watchdog Timer with On-Chip Oscillator • On-Chip Analog Comparator • 8-Channel, 10-Bit ADC • Low Power Idle, Power Save and Power Down Modes • Software Selectable Clock Frequency • Programming Lock for Software Security Pin Configuration Rev. 0945BS–09/98 8-Bit Microcontroller with 64K/128K Bytes In-System Programmable Flash ATmega603 ATmega603L ATmega103 ATmega103L Preliminary ATmega103/L ATmega103/L TQFP Note: This is a summary document. For the complete 92 page document, please visit our web site at www.atmel.com or e-mail at literature@atmel.com and request literature #0945B. |
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