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T5760-TG Datasheet(PDF) 10 Page - ATMEL Corporation |
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T5760-TG Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 32 page  T5760 T5761 / Rev. A2, 19-Oct-00 Preliminary Information 10 (32) Bit check IC_ACTIVE Dem_out Bit–check– counter 0 2 345 6 24 5 1 7 81 36 7 8 9 11 12 13 14 10 1/2 Bit 15 16 17 18 1 234 56 ( Lim_min = 14, Lim_max = 24 ) 789 10 11 12 13 14 15 12 3 4 1/2 Bit 1/2 Bit Bit check ok Bit check ok T XClk Start–up mode Bit–check mode T Start–up T Bit–check Figure 11. Timing diagram during bit check Bit check IC_ACTIVE Bit–check– counter 0 234 5 6 24 5 1 1 3 678 9 11 12 10 1/2 Bit Start–up mode 0 ( Lim_min = 14, Lim_max = 24 ) Sleep mode Bit check failed ( CV_Lim < Lim_min ) Dem_out Bit–check mode T Start–up T Bit–check T Sleep Figure 12. Timing diagram for failed bit check (condition: CV_Lim < Lim_min) Bit check IC_ACTIVE Bit–check– counter 0 234 5 6 24 5 1 7 36 7 8 9 11 12 10 1/2 Bit Start–up mode 20 ( Lim_min = 14, Lim_max = 24 ) Sleep mode Bit check failed ( CV_Lim >= Lim_max ) 13 14 15 16 17 18 19 21 22 23 24 0 1 Dem_out Bit–check mode T Start–up T Bit–check T Sleep Figure 13. Timing diagram for failed bit check (condition: CV_Lim >= Lim_max) Duration of the Bit Check If no transmitter signal is present during the bit check, the output of the ASK/ FSK demodulator delivers random signals. The bit check is a statistical process and TBit-check varies for each check. Therefore, an average value for TBit-check is given in the electrical characteristics. TBit-check depends on the selected baud-rate range and on TClk. A higher baud-rate range causes a lower value for TBit-check resulting in a lower current consumption in pol- ling mode. In the presence of a valid transmitter signal, TBit-check is dependent on the frequency of that signal, fSig, and the count of the checked bits, NBit-check. A higher value for NBit-check thereby results in a longer period for TBit-check requiring a higher value for the transmitter pre-burst TPreburst. Receiving Mode If the bit check was successful for all bits specified by NBit-check, the receiver switches to receiving mode. Ac- cording to figure 9, the internal data signal is switched to Pin DATA in that case and the data clock is available after the start bit has been detected (figure 20). A connected µC can be woken up by the negative edge at Pin DATA or by the data clock at Pin DATA_CLK. The receiver stays in that condition until it is switched back to polling mode ex- plicitly. |
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