AT76C101

9

Table 1. Signal Description

Signal

Type

Description

BST_TEST

Input

BIST test pin (used only for testing), should be grounded.

CLK

Input

Master Clock.

FREEZE

Input

Stall Signal, active high. When this signal is asserted, the chip finishes processing the current

block and then remains in that state until freeze is pulled low.

MAST_CS

Input

Master Chip Select Input. Used by microcontroller to access the JPEG chip. Active low.

PX_CLK

Input

Video Interface Clock (27 MHz fixed).

RESET_

Input

Global Reset Signal, active high, minimum pulse width is three CLK_IN 40 MHz cycles.

TEST

Input

Active high - Puts chip in test mode. User has access to all internal memory. Must be tied to gnd

for normal operation.

HSync

Bidirectional

Indicates start of a horizontal line of the frame.

M_ADD[19:0]

Bidirectional

Memory/Microcontroller Address Bus. Used by JPEG chip to access the compressed data

memory, and used by microcontroller to access the JPEG chip.

M_DATA[7:0]

Bidirectional

Memory/ Microcontroller Data Bus. Used to transfer compressed data to the external storage unit.

Also used by microcontroller to program the JPEG chip.

MAST_OE

Bidirectional

Memory/ Microcontroller Read Select. Active low. Used by microcontroller to read from JPEG

chip and used by JPEG chip to read compressed data from memory.

MAST_WR

Bidirectional

Memory/Microcontroller Write Select. Active low. Used by microcontroller to write to JPEG and

used by JPEG to write to compressed data memory.

SRData[15:0]

Bidirectional

Pixel Data Bus for inputting uncompressed data in encoding mode, or for outputting

decompressed image data in decoding mode.

VSync

Bidirectional

Indicates the start of a frame.

BUSY

Output

Microcontroller bus busy.

Signals whether the JPEG chip (high) or microcontroller (low) controls the bus.

FRAMEND

Output

End of encoding/decoding operation. FRAMEND is active after chip is reset and it remains active

until the Start Register is set by the host.

MEM_CS

Output

Compressed data memory select. Active low. Used by JPEG to select the external memory

device used to store the compressed data stream.

PXIN

Output

Pixel Input Control. It is asserted low when pixels are being input from the active portion of the

frame into the strip buffer.

PXOUT

Output

Pixel Output Control. It ia active only when the pixels from the active region of the field are being

read from the strip buffer.

PXRE

Output

Active low. Controls reading data from external memory.

PXWE

Output

Active low. Controls writing to the external memory.

SRADD[14:0]

Output

Pixel Address Bus. This bus specifies the address location of the external memory device (strip

buffer), from/ to which the pixel data is transferred. Supports external memory of up to 32K

locations.

SRDRIVE

Output

Indicates that the AT76C101 is driving the SRDATA Bus.

stop_pixel

Output

When asserted, all operations in the video interface are stopped. Active when the DCT buffers

are full, or when the ext. video logic is not ready.