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AT49F020-70JC Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT49F020-70JC Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 10 page AT49F020 5 AC Read Waveforms(1)(2)(3)(4) Notes: 1. CE may be delayed up to t ACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to t CE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on t ACC. 3. t DF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested. Input Test Waveforms and Measurement Level Output Test Load Note: 1. This parameter is characterized and is not 100% tested. AC Read Characteristics AT49F020-55 AT49F020-70 AT49F020-90 Symbol Parameter Min Max Min Max Min Max Units t ACC Address to Output Delay 55 70 90 ns t CE (1) CE to Output Delay 55 70 90 ns t OE (2) OE to Output Delay 0 30 0 35 0 40 ns t DF (3)(4) CE or OE to Output Float 025025025 ns t OH Output Hold from OE, CE or Address, whichever occurred first 000 ns Pin Capacitance(1) (f = 1 MHz, T = 25°C) Typ Max Units Conditions C IN 46 pF V IN = 0V C OUT 812 pF V OUT = 0V ADDRESS CE OUTPUT OE OUTPUT VALID tACC ADDRESS VALID HIGH Z tDF tCE tOH AC DRIVING LEVELS AC MEASUREMENT LEVEL 0.0V 1.5V 3.0V tR, tF < 5 ns 100 pF 1.3K 1.8K 5.0V OUTPUT PIN |
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