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LPV521MGX Datasheet(PDF) 4 Page - Texas Instruments |
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LPV521MGX Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 29 page  LPV521 SNOSB14C – AUGUST 2009 – REVISED FEBRUARY 2013 www.ti.com 1.8V AC Electrical Characteristics (1) Unless otherwise specified, all limits guaranteed for TA = 25°C, V + = 1.8V, V− = 0V, V CM = VO = V +/2, and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ Max Units (2) (3) (2) GBW Gain-Bandwidth Product CL = 20 pF, RL = 100 kΩ 6.1 kHz SR Slew Rate AV = +1, Falling Edge 2.9 V/ms VIN = 0V to 1.8V Rising Edge 2.3 θ m Phase Margin CL = 20 pF, RL = 100 kΩ 72 deg Gm Gain Margin CL = 20 pF, RL = 100 kΩ 19 dB en Input-Referred Voltage Noise Density f = 100 Hz 265 nV/ √Hz Input-Referred Voltage Noise 0.1 Hz to 10 Hz 24 μVPP in Input-Referred Current Noise f = 100 Hz 100 fA/ √Hz (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically. (2) All limits are guaranteed by testing, statistical analysis or design. (3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. 3.3V DC Electrical Characteristics (1) Unless otherwise specified, all limits guaranteed for TA = 25°C, V + = 3.3V, V− = 0V, V CM = VO = V +/2, and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Min Typ Max Symbol Parameter Conditions Units (2) (3) (2) VOS Input Offset Voltage 0.1 ±1.0 VCM = 0.3V ±1.23 mV 0.1 ±1.0 VCM = 3V ±1.23 TCVOS Input Offset Voltage Drift(4) ±0.4 ±3 μV/°C IBIAS Input Bias Current 0.01 ±1 pA ±50 IOS Input Offset Current 20 fA CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 3.3V 72 97 70 78 106 0V ≤ VCM ≤ 2.2V dB 75 77 121 2.7V ≤ VCM ≤ 3.3V 76 PSRR Power Supply Rejection Ratio 1.6V ≤ V+ ≤ 5.5V 85 109 dB VCM = 0.3V 76 CMRR ≥ 72 dB −0.1 3.4 CMVR Common Mode Voltage Range V CMRR ≥ 70 dB 0 3.3 VO = 0.5V to 2.8V 82 120 AVOL Large Signal Voltage Gain dB RL = 100 kΩ to V +/2 76 (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically. (2) All limits are guaranteed by testing, statistical analysis or design. (3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. (4) The offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change. 4 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LPV521 |
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