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LP2986AIM-3.0 Datasheet(PDF) 3 Page - Texas Instruments |
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LP2986AIM-3.0 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 26 page using: The value of θJ−A for the SOIC-8 package is 160°C/W, and the VSSOP-8 package is 200°C/W. The value LP2986 www.ti.com SNVS137H – MARCH 1999 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) Storage Temperature Range −65°C to +150°C Operating Junction Temperature Range −40°C to +125°C Lead Temperature (Soldering, 5 seconds) 260°C ESD Rating(3) 2 kV Power Dissipation(4) Internally Limited Input Supply Voltage (Survival) −0.3V to +16V Input Supply Voltage (Operating) 2.1V to +16V Shutdown Pin −0.3V to +16V Feedback Pin −0.3V to +5V Output Voltage (Survival)(5) −0.3V to +16V IOUT (Survival) Short Circuit Protected Input-Output Voltage (Survival)(6) −0.3V to +16V (1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. (3) The ESD rating of the Feedback pin is 500V. The ESD rating of the VIN pin is 1kV and the Tap pin is 1.5 kV. (4) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ−A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated θJ−A for the WSON package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the WSON package, refer to Application Note AN-1187. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. (5) If used in a dual-supply system where the regulator load is returned to a negative supply, the LM2986 output must be diode-clamped to ground. (6) The output PNP structure contains a diode between the V IN and VOUT terminals that is normally reverse-biased. Forcing the output above the input will turn on this diode and may induce a latch-up mode which can damage the part (see Application Hints). Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LP2986 |
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