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NCV803SQ308D2T1G Datasheet(PDF) 7 Page - ON Semiconductor

Part # NCV803SQ308D2T1G
Description  Very Low Supply Current 3-Pin Microprocessor Reset Monitor
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCV803SQ308D2T1G Datasheet(HTML) 7 Page - ON Semiconductor

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MAX803 Series, NCP803 Series
http://onsemi.com
7
APPLICATIONS INFORMATION
VCC Transient Rejection
The MAX803/NCP803 series provides accurate VCC
monitoring
and
reset
timing
during power−up,
power−down, and brownout/sag conditions, and rejects
negative−going transients (glitches) on the power supply
line. Figure 13 shows the maximum transient duration vs.
maximum negative excursion (overdrive) for glitch
rejection. Any combination of duration and overdrive which
lies under the curve will not generate a reset signal.
Combinations above the curve are detected as a brownout or
power−down. Typically, transient that goes 100 mV below
the reset threshold and lasts 5.0
ms or less will not cause a
reset pulse. Transient immunity can be improved by adding
a capacitor in close proximity to the VCC pin of the
MAX803.
Figure 13. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25°C
Duration
VTH
Overdrive
VCC
10
250
200
110
60
50
RESET COMPARATOR OVERDRIVE (mV)
0
410
150
100
VTH = 1.2 V
160
210
260
310
360
VTH = 4.63 V
RESET Signal Integrity During Power−Down
The MAX803/NCP803 RESET output is valid to VCC =
1.0 V. Below this voltage the output becomes an “open
circuit” and does not sink current. This means CMOS logic
inputs to the Microprocessor will be floating at an
undetermined voltage. Most digital systems are completely
shutdown well above this voltage. However, in situations
where RESET must be maintained valid to VCC = 0 V, since
the NCP803/MAX803 has Open−Drain and active−low
output, it typically uses a pullup resistor. With this device,
RESET will most likely not maintain an active condition,
but will drift to a non−active level due to the pullup resistor
and the reduced sinking capability of the open−drain device.
Therefore, this device is not recommended for applications
where the RESET pin is required to be valid down to
VCC = 0 V.
VCC
VCC
R1
100 k*
MAX809
NCP803
GND
Figure 14. RESET Signal Integrity
RESET
*Assume High−Z Reset Input to Microprocessor
MAX803 RESET Output Allows Use With Two Power
Supplies
In numerous applications the pullup resistor place on the
RESET output is connected to the supply voltage monitored
by the IC. Nevertheless, a different supply voltage can also
power this output and so level−shift from the monitored
supply to reset the microprocessor. However, if the
NCP803/MAX803’s supply goes blew 1 V, the RESET
output ability to sink current will decrease and the result is
a high state on the pin even though the supply’s IC is under
the threshold level. This occurs at a VCC level that depends
on the Rpullup value and the voltage which is connected.
VCC
VCC2
Microprocessor
RESET
MAX803
NCP803
GND
GND
Rpullup
Figure 15. MAX803 RESET Output with Two Supplies
RESET
VCC
VCC1


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