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S9S08QD2 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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S9S08QD2 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 198 page MC9S08QD4 Series MCU Data Sheet, Rev. 6 10 Freescale Semiconductor 4.5.2 Program and Erase Times .................................................................................................37 4.5.3 Program and Erase Command Execution .........................................................................38 4.5.4 Burst Program Execution ..................................................................................................39 4.5.5 Access Errors ....................................................................................................................41 4.5.6 Flash Block Protection ......................................................................................................42 4.5.7 Vector Redirection ............................................................................................................43 4.6 Security ............................................................................................................................................43 4.7 Flash Registers and Control Bits .....................................................................................................44 4.7.1 Flash Clock Divider Register (FCDIV) ............................................................................44 4.7.2 Flash Options Register (FOPT and NVOPT) ....................................................................46 4.7.3 Flash Configuration Register (FCNFG) ...........................................................................47 4.7.4 Flash Protection Register (FPROT and NVPROT) ..........................................................47 4.7.5 Flash Status Register (FSTAT) ..........................................................................................48 4.7.6 Flash Command Register (FCMD) ...................................................................................49 Chapter 5 Resets, Interrupts, and General System Control 5.1 Introduction .....................................................................................................................................51 5.2 Features ...........................................................................................................................................51 5.3 MCU Reset ......................................................................................................................................51 5.4 Computer Operating Properly (COP) Watchdog .............................................................................52 5.5 Interrupts .........................................................................................................................................53 5.5.1 Interrupt Stack Frame .......................................................................................................54 5.5.2 External Interrupt Request (IRQ) Pin ...............................................................................54 5.5.3 Interrupt Vectors, Sources, and Local Masks ...................................................................55 5.6 Low-Voltage Detect (LVD) System ................................................................................................56 5.6.1 Power-On Reset Operation ...............................................................................................57 5.6.2 LVD Reset Operation ........................................................................................................57 5.6.3 LVD Interrupt Operation ...................................................................................................57 5.6.4 Low-Voltage Warning (LVW) ...........................................................................................57 5.7 Real-Time Interrupt (RTI) ...............................................................................................................57 5.8 Reset, Interrupt, and System Control Registers and Control Bits ...................................................58 5.8.1 Interrupt Pin Request Status and Control Register (IRQSC) ............................................58 5.8.2 System Reset Status Register (SRS) .................................................................................59 5.8.3 System Background Debug Force Reset Register (SBDFR) ............................................60 5.8.4 System Options Register 1 (SOPT1) ................................................................................61 5.8.5 System Options Register 2 (SOPT2) ................................................................................62 5.8.6 System Device Identification Register (SDIDH, SDIDL) ................................................62 5.8.7 System Real-Time Interrupt Status and Control Register (SRTISC) ................................63 5.8.8 System Power Management Status and Control 1 Register (SPMSC1) ...........................64 5.8.9 System Power Management Status and Control 2 Register (SPMSC2) ...........................65 Chapter 6 Parallel Input/Output Control 6.1 Port Data and Data Direction ..........................................................................................................67 |
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