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EP2SGX60D Datasheet(PDF) 1 Page - Altera Corporation |
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EP2SGX60D Datasheet(HTML) 1 Page - Altera Corporation |
1 / 36 page January 2012 Altera Corporation CF52002-3.0 Datasheet © 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. 101 Innovation Drive San Jose, CA 95134 www.altera.com Subscribe ISO 9001:2008 Registered Enhanced Configuration (EPC) Devices Datasheet This datasheet describes enhanced configuration (EPC) devices. Supported Devices Table 1 lists the supported Altera EPC devices. Features EPC devices offer the following features: ■ Single-chip configuration solution for Altera ACEX 1K, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K (including FLEX 10KE and FLEX 10KA), Mercury, Stratix II, and Stratix II GX devices ■ Contains 4-, 8-, and 16-Mb flash memories for configuration data storage ■ On-chip decompression feature almost doubles the effective configuration density ■ Standard flash die and a controller die combined into single stacked chip package ■ External flash interface supports parallel programming of flash and external processor access to unused portions of memory ■ Flash memory block or sector protection capability using the external flash interface ■ Supported in EPC4 and EPC16 devices ■ Page mode support for remote and local reconfiguration with up to eight configurations for the entire system ■ Compatible with Stratix series remote system configuration feature ■ Supports byte-wide configuration mode fast passive parallel (FPP) with an 8-bit data output per DCLK cycle ■ Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs Table 1. Altera EPC Devices Device Memory Size (bits) On-Chip Decompression Support ISP Support Cascading Support Reprogrammable Recommended Operating Voltage (V) EPC4 4,194,304 Yes Yes No Yes 3.3 EPC8 8,388,608 Yes Yes No Yes 3.3 EPC16 16,777,216 Yes Yes No Yes 3.3 |
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