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IXP2400 Datasheet(PDF) 3 Page - Intel Corporation |
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IXP2400 Datasheet(HTML) 3 Page - Intel Corporation |
3 / 126 page Intel® IXP2400 Network Processor Datasheet 3 Contents 1.0 Product Description ........................................................................................................... 7 2.0 Functional Units............................................................................................................... 10 2.1 Functional Overview........................................................................................... 10 2.2 Intel XScale® Core.............................................................................................. 11 2.2.1 Instruction Cache .................................................................................. 12 2.2.2 Data Cache ........................................................................................... 12 2.2.3 Debug .................................................................................................... 12 2.2.4 Memory Management ........................................................................... 13 2.2.5 Branch Target Buffer ............................................................................. 13 2.3 Microengines ...................................................................................................... 13 2.3.1 Control Store ......................................................................................... 14 2.3.2 General-Purpose Registers (GPRs) ...................................................... 15 2.3.3 Transfer Registers ................................................................................. 15 2.3.4 Next Neighbor Registers ....................................................................... 15 2.3.5 Local Memory (LM) ............................................................................... 15 2.3.6 CRC Unit ............................................................................................... 16 2.3.7 Event Signals ........................................................................................ 16 2.4 DDR SDRAM...................................................................................................... 16 2.5 SRAM ................................................................................................................. 17 2.5.1 SRAM Controller Configurations ........................................................... 18 2.6 Media and Switch Fabric Interface ..................................................................... 19 2.6.1 PHY Modes Supported.......................................................................... 19 2.6.2 CSIX ...................................................................................................... 20 2.7 PCI Controller..................................................................................................... 20 2.8 XPI Unit .............................................................................................................. 21 2.8.1 GPIO ..................................................................................................... 21 2.8.2 Serial Port.............................................................................................. 21 2.8.3 SlowPort ................................................................................................ 21 3.0 Signal Description ...........................................................................................................23 3.1 Ballout Functional Groupings Diagram............................................................... 23 3.2 Ball Descriptions Grouped by Function .............................................................. 23 3.2.1 DDR SDRAM......................................................................................... 24 3.2.2 SRAM .................................................................................................... 24 3.2.3 Media and Switch Fabric (MSF) Interface ............................................. 25 3.2.4 PCI ........................................................................................................ 63 3.2.5 SlowPort Signals ................................................................................... 64 3.2.6 GPIO Signals......................................................................................... 64 3.2.7 Serial Port Signals................................................................................. 65 3.2.8 Clock Signals......................................................................................... 65 3.2.9 Test, JTAG, and Miscellaneous Signals................................................ 65 3.2.10 Configuration Pins ................................................................................. 67 3.2.11 Pin State During Reset .......................................................................... 68 3.3 Power Supply Sequencing ................................................................................. 68 3.3.1 Power-Up Sequence ............................................................................. 68 3.3.2 Power-Down Sequence......................................................................... 68 |
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