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MPC8347ECZQALFB Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MPC8347ECZQALFB Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 99 page  MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 Freescale Semiconductor 9 Electrical Characteristics Figure 3 shows the undershoot and overshoot voltage of the PCI interface of the MPC8347EA for the 3.3-V signals, respectively. Figure 3. Maximum AC Waveforms on PCI Interface for 3.3-V Signaling 2.1.3 Output Driver Characteristics Table 3 provides information on the characteristics of the output driver strengths. The values are preliminary estimates. 2.2 Power Sequencing This section details the power sequencing considerations for the MPC8347EA. 2.2.1 Power-Up Sequencing MPC8347EAdoes not require the core supply voltage (VDD and AVDD) and I/O supply voltages (GVDD, LVDD, and OVDD) to be applied in any particular order. During the power ramp up, before the power Table 3. Output Drive Capability Driver Type Output Impedance ( Ω) Supply Voltage Local bus interface utilities signals 40 OVDD = 3.3 V PCI signals (not including PCI output clocks) 25 PCI output clocks (including PCI_SYNC_OUT) 40 DDR signal 18 GVDD = 2.5 V DDR2 signal 18 36 (half-strength mode) GVDD = 1.8 V TSEC/10/100 signals 40 LVDD = 2.5/3.3 V DUART, system control, I2C, JTAG, USB 40 OVDD = 3.3 V GPIO signals 40 OVDD = 3.3 V, LVDD = 2.5/3.3 V Undervoltage Waveform Overvoltage Waveform 11 ns (Min) +7.1 V 7.1 V p-to-p (Min) 4 ns (Max) –3.5 V 7.1 V p-to-p (Min) 62.5 ns +3.6 V 0 V 4 ns (Max) |
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