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MPC8347ECVVAGDB Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MPC8347ECVVAGDB Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 99 page MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 10 Freescale Semiconductor Power Characteristics supplies are stable and if the I/O voltages are supplied before the core voltage, there may be a period of time that all input and output pins will actively be driven and cause contention and excessive current from 3A to 5A. In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltage (VDD) before the I/O voltage (GVDD, LVDD, and OVDD) and assert PORESET before the power supplies fully ramp up. In the case where the core voltage is applied first, the core voltage supply must rise to 90% of its nominal value before the I/O supplies reach 0.7 V, see Figure 4. Figure 4. Power Sequencing Example I/O voltage supplies (GVDD, LVDD, and OVDD) do not have any ordering requirements with respect to one another. 3 Power Characteristics The estimated typical power dissipation for the MPC8347EA device is shown in Table 4. Table 4. MPC8347EA Power Dissipation1 Core Frequency (MHz) CSB Frequency (MHz) Typical at TJ = 65 Typical2 ,3 Maximum4 Unit PBGA 266 266 1.3 1.6 1.8 W 133 1.1 1.4 1.6 W 400 266 1.5 1.9 2.1 W 133 1.4 1.7 1.9 W 400 200 1.5 1.8 2.0 W 100 1.3 1.7 1.9 W I/O Voltage (GVDD, LVDD, OVDD) Core Voltage (VDD, AVDD) 90% 0.7 V Time Voltage |
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