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LPC1813JBD144 Datasheet(PDF) 9 Page - NXP Semiconductors |
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LPC1813JBD144 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 147 page LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Preliminary data sheet Rev. 4 — 31 October 2012 9 of 147 NXP Semiconductors LPC185x/3x/2x/1x 32-bit ARM Cortex-M3 microcontroller P1_1 R2 K2 42 58 [2] N; PU I/O GPIO0[8] — General purpose digital input/output pin. External boot pin (see Table 5). O CTOUT_7 — SCT output 7. Match output 3 of timer 1. I/O EMC_A6 — External memory address line 6. - R — Function reserved. - R — Function reserved. I/O SSP0_MISO — Master In Slave Out for SSP0. - R — Function reserved. I/O EMC_D13 — External memory data line 13. P1_2 R3 K1 43 60 [2] N; PU I/O GPIO0[9] — General purpose digital input/output pin. External boot pin (see Table 5). O CTOUT_6 — SCT output 6. Match output 2 of timer 1. I/O EMC_A7 — External memory address line 7. - R — Function reserved. - R — Function reserved. I/O SSP0_MOSI — Master Out Slave in for SSP0. - R — Function reserved. I/O EMC_D14 — External memory data line 14. P1_3 P5 J1 44 61 [2] N; PU I/O GPIO0[10] — General purpose digital input/output pin. O CTOUT_8 — SCT output 8. Match output 0 of timer 2. - R — Function reserved. O EMC_OE — LOW active Output Enable signal. O USB0_IND1 — USB0 port indicator LED control output 1. I/O SSP1_MISO — Master In Slave Out for SSP1. - R — Function reserved. O SD_RST — SD/MMC reset signal for MMC4.4 card. P1_4 T3 J2 47 64 [2] N; PU I/O GPIO0[11] — General purpose digital input/output pin. O CTOUT_9 — SCT output 9. Match output 3 of timer 3. - R — Function reserved. O EMC_BLS0 — LOW active Byte Lane select signal 0. O USB0_IND0 — USB0 port indicator LED control output 0. I/O SSP1_MOSI — Master Out Slave in for SSP1. I/O EMC_D15 — External memory data line 15. O SD_VOLT1 — SD/MMC bus voltage select output 1. Table 3. Pin description …continued Pin name Description |
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