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HEF4094BT Datasheet(PDF) 9 Page - NXP Semiconductors |
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HEF4094BT Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 20 page HEF4094B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 11 — 29 August 2013 9 of 20 NXP Semiconductors HEF4094B 8-stage shift-and-store register 11. Waveforms Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Clock to outputs propagation delays, and clock pulse width and maximum frequency 1/fmax tW tPHL tPLH VI GND VOH VOL QPn, QS1 output CP input VM VM 001aaf113 tPHL tPLH VOH VOL QS2 output VM Table 9. Measurement points Supply voltage Input Output VDD VM VM VX VY 5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Strobe to output propagation delays, and strobe pulse width, set up and hold times tW tPHL tPLH VI GND VOH VOL QPn output STR input VM VM 001aaj058 |
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