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74LVC1G17GS Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVC1G17GS Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 21 page 74LVC1G17 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 10 — 29 June 2012 9 of 21 NXP Semiconductors 74LVC1G17 Single Schmitt trigger buffer 13. Application information 2.7V 1.5V 1.5V 3.0V to 3.6V 1.5V 1.5V 4.5 V to 5.5 V 0.5 V CC 0.5 V CC Table 10. Measurement points …continued Supply voltage Input Output VCC VM VM Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 12. Test circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 11. Test data Supply voltage Input Load VEXT VCC VI tr =tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC 2.0ns 30pF 1k open 2.3 V to 2.7 V VCC 2.0ns 30pF 500 open 2.7V 2.7V 2.5ns 50pF 500 open 3.0V to 3.6V 2.7V 2.5ns 50pF 500 open 4.5 V to 5.5 V VCC 2.5ns 50pF 500 open |
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