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TB5R1DWRE4 Datasheet(PDF) 2 Page - Texas Instruments |
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TB5R1DWRE4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 16 page www.ti.com POWER DISSIPATION RATINGS ABSOLUTE MAXIMUM RATINGS TB5R1, TB5R2 SLLS588C – NOVEMBER 2003 – REVISED JANUARY 2008 Enable Truth Table (continued) E1 E2 CONDITION 1 1 Active These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PART NUMBER PART MARKING Package LEAD FINISH STATUS TB5R1DW TB5R1 Gull-Wing SOIC NiPdAu Production TB5R1D TB5R1 SOIC NiPdAu Production TB5R2DW TB5R2 Gull-Wing SOIC NiPdAu Production TB5R2D TB5R2 SOIC NiPdAu Production THERMAL RESISTANCE, DERATING CIRCUIT BOARD POWER RATING POWER RATING PACKAGE JUNCTION-TO-AMBIENT FACTOR(1)TA≥ MODEL TA≤ 25°C TA = 85°C WITH NO AIR FLOW 25°C Low-K(2) 763 mW 131.1 °C/W 7.6 mW/ °C 305 mW D High-K(3) 1190 mW 84.1 °C/W 11.9 mW/ °C 475 mW Low-K(2) 831 mW 120.3 °C/W 8.3 mW/ °C 332 mW DW High-K(3) 1240 mW 80.8 °C/W 12.4 mW/ °C 494 mW (1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted with no air flow. (2) In accordance with the low-K thermal metric definitions of EIA/JESD51-3. (3) In accordance with the high-K thermal metric definitions of EIA/JESD51-7. THERMAL CHARACTERISTICs PARAMETER PACKAGE VALUE UNIT D 47.5 °C/W θ JB Junction-to-Board Thermal Resistance DW 53.7 °C/W D 44.2 °C/W θ JC Junction-to-Case Thermal Resistance DW 47.1 °C/W over operating free-air temperature range unless otherwise noted (1) UNIT Supply voltage, VCC 0 V to 6 V Magnitude of differential bus (input) voltage, |VAI - V|, |VBI - V|, |VCI - V|, |VDI - V| 8.4 V Human Body Model(2) All pins 3 kV ESD Charged-Device Model(3) All pins 2 kV Continuous power dissipation See Dissipation Rating Table Storage temperature, Tstg –65 °C to 150°C (1) Stresses beyond those listed under„ absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under„ recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Tested in accordance with JEDEC Standard 22, Test Method A114-A. (3) Tested in accordance with JEDEC Standard 22, Test Method C101. 2 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): TB5R1 TB5R2 |
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