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LP621024DX-55LLT Datasheet(PDF) 10 Page - AMIC Technology

Part # LP621024DX-55LLT
Description  128K X 8 BIT CMOS SRAM
Download  16 Pages
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

LP621024DX-55LLT Datasheet(HTML) 10 Page - AMIC Technology

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LP621024D-T Series
(August, 2001, Version 1.0)
10
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Time
5 ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figures 1 and 2
+5V
I/O
990
Ω
1800
Ω
30pF*
* Including scope and jig.
+5V
I/O
990
Ω
1800
Ω
5pF*
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = -25
°C to 85°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR1
2.0
5.5
V
CE1
≥ VCC - 0.2V
VDR2
VCC for Data Retention
2.0
5.5
V
CE2
≤ 0.2V
CE1
≥ VCC - 0.2V or
CE1
≤ 0.2V
ICCDR1
Data Retention Current
LL-Version
-
20**
µA
VCC = 2.0V,
CE1
≥ VCC - 0.2V
CE2
≥ VCC - 0.2V
VIN
≥ 0V
ICCDR2
LL-Version
-
20**
µA
VCC = 2.0V
CE2
≤ 0.2V
VIN
≥ 0V
tCDR
Chip Disable to Data Retention Time
0
-
ns
See Retention Waveform
tR
Operation Recovery Time
5
-
ms
** LP621024D-55LLT/70LLT
ICCDR: Max.
2
µA at TA = 0°C to + 40 °C


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