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A65H73361 Datasheet(PDF) 6 Page - AMIC Technology

Part # A65H73361
Description  128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A65H73361 Datasheet(HTML) 6 Page - AMIC Technology

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A65H73361/A65H83181 Series
PRELIMINARY
(February, 1999, Version 2.0)
5
AMIC Technology, Inc.
Absolute Maximum Ratings*
Power Supply Voltage(VDD) . . . . . . . . . . -0.5V to +4.6V
Voltage Relative to GND for any Pin Except VDD(VIN,
VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Power Dissipation (PD) . . . . . . . . .. . . . . . . . . . .. . .1.0W
Operating Temperature (Topr). . . . . . . . .. . 0
°C to 70°C
Storage Temperature (Tbias) . . . . . . .. .. . -10
°C to 85°C
Storage Temperature(Tstg). . . . . . . . . . .-55
°C to 125°C
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied and exposure the absolute maximum
rating conditions for extended periods may affect device
reliability.
Recommended DC Operating Conditions (TJ = 0 to 110
°C)
Parameter
Symbol
Min.
Typ.
Max.
Units
Notes
Supply Voltage
VDD
3.15
3.3
3.47
V
1
Output Driver Supply Voltage
VDDQ
1.4
1.5
1.6
V
1
Input High Voltage
VIH
VREF+0.1
-
VDDQ+0.3
V
1, 2
Input Low Voltage
VIL
-0.3
-
VREF-0.1
V
1, 3
Input reference Voltage
VREF
0.68
0.75
0.90
V
1, 6
Clocks Signal Voltage
VIN-CLK
-0.3
-
VDDQ+0.3
V
1, 4
Differential Clocks Signal Voltage
VDIF-CLK
0.1
-
VDDQ+0.6
V
1, 5
Clocks Common Mode Voltage
VCM-CLK
0.55
-
0.90
V
1
Output Current
IOUT
-
5
8
mA
1.All voltage reference to VSS. All VDD VDDQ and VSS pins must be connected.
2.VIH(Max)DC = VDD + 0.3V, VIH(Max)AC = VDD + 1.5V (pulse width
≤4.0ns).
3.VIL(Min)DC = -0.3V, VIL(Min)AC = -1.5 V (pulse width
≤4.0ns).
4.VIN-CLK specifies the maximum allowable DC excursions of each differential clock (
CK , CK ).
5.VDIF-CLK specifies the minimum clock differential voltage required for switching.
6.Peak to Peak AC component superimposed on VREF may not exceed 5% of VREF.


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