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A62S6308V-70S Datasheet(PDF) 3 Page - AMIC Technology |
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A62S6308V-70S Datasheet(HTML) 3 Page - AMIC Technology |
3 / 17 page A62S6308 Series (October, 1998, Version 2.0) 2 AMIC Technology, Inc. Block Diagram ROW DECODER 512 X 1024 MEMORY ARRAY INPUT DATA CIRCUIT COLUMN I/O CONTROL CIRCUIT CE2 CE1 WE I/O8 I/O1 A15 A14 A13 A0 VCC GND OE Pin Descriptions - SOP Pin No. Symbol Description 1,2 NC No Connection 3 - 12, 23, 25 - 28, 31 A0 - A15 Address Inputs 13 - 15, 17 - 21 I/O1 - I/O8 Data Inputs/Outputs 16 GND Ground 22 CE1 Chip Enable 24 OE Output Enable 29 WE Write Enable 30 CE2 Chip Enable 32 VCC Power Supply Pin Description - TSOP/sTSOP Pin No. Symbol Description 1 - 4, 7, 11 - 20, 31 A0 - A15 Address Inputs 5 WE Write Enable 6 CE2 Chip Enable 8 VCC Power Supply 9, 10 NC No Connection 21 - 23, 25 - 29 I/O1 - I/O8 Data Inputs/Outputs 24 GND Ground 30 CE1 Chip Enable 32 OE Output Enable |
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