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A625308AV-70S Datasheet(PDF) 9 Page - AMIC Technology

Part # A625308AV-70S
Description  32K X 8 BIT CMOS SRAM
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A625308AV-70S Datasheet(HTML) 9 Page - AMIC Technology

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A625308A Series
PRELIMINARY
(July, 2002, Version 0.2)
8
AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 2
(6)
(Chip Enable Controlled)
tWC
Address
CE
DIN
tDH
tDW
(4)
tCW5
tAW
tWR3
WE
DOUT
tWHZ7
tWP2
tAS1
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE .
3. tWR is measured form the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs
remain in a high impedance state.
5. tCW is measured from the later of CE going low to the end of Write.
6. OE level is high or low.
7. Transition is measured
±500mV from steady. This parameter is sampled and not 100% tested.


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