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SN65HVD75DRBR Datasheet(PDF) 3 Page - Texas Instruments |
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SN65HVD75DRBR Datasheet(HTML) 3 Page - Texas Instruments |
3 / 30 page SN65HVD72 SN65HVD75 SN65HVD78 www.ti.com SLLSE11C – MARCH 2012 – REVISED SEPTEMBER 2013 ABSOLUTE MAXIMUM RATINGS (1) VALUE UNIT MIN MAX Supply Voltage, VCC –0.5 5.5 V Voltage range at A or B Inputs –13 16.5 V Input voltage range at any logic pin –0.3 5.7 V Voltage input range, transient pulse, A and B, through 100 Ω –100 100 V Receiver Output Current –24 24 mA Junction Temperature, TJ 170 °C Storage Temperature, -65 150 °C Continuous total power dissipation See the Thermal Characteristics table IEC 61000-4-2 ESD (Air-Gap Discharge), bus terminals and GND (2) ±12 kV IEC 61000-4-2 ESD (Contact Discharge), bus terminals and GND ±12 kV IEC 61000-4-4 EFT (Fast transient or burst) bus terminals and GND ±4 kV IEC 60749-26 ESD (Human Body Model), bus terminals and GND ±15 kV JEDEC Standard 22, Test Method A114 (Human Body Model), all pins ±8 kV JEDEC Standard 22, Test Method C101 (Charged Device Model), all pins ±1.5 kV JEDEC Standard 22, Test Method A115 (Machine Model), all pins ±300 V (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) By inference from contact discharge results, see the Application Information section RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT VCC Supply voltage 3 3.3 3.6 V VI Input voltage at any bus terminal (separately or common mode) (1) –7 12 V VIH High-level input voltage (Driver, driver enable, and receiver enable inputs) 2 VCC V VIL Low-level input voltage (Driver, driver enable, and receiver enable inputs) 0 0.8 V VID Differential input voltage –12 12 V IO Output current, Driver –60 60 mA IO Output current, Receiver –8 8 mA RL Differential load resistance 54 60 Ω CL Differential load capacitance 50 pF HVD72 250 kbps Signaling rate HVD75 20 Mbps 1/tUI HVD78 50 Mbps TA (2) Operating free-air temperature (See the application section for thermal information) –40 125 °C TJ Junction Temperature –40 150 °C (1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. (2) Operation is specified for internal (junction) temperatures up to 150°C. Self-heating due to internal power dissipation should be considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which disables the driver outputs when the junction temperature reaches 170°C. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: SN65HVD72 SN65HVD75 SN65HVD78 |
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