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W25Q80BWSNIG Datasheet(PDF) 51 Page - Winbond

Part # W25Q80BWSNIG
Description  1.8V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W25Q80BWSNIG Datasheet(HTML) 51 Page - Winbond

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W25Q80BW
Publication Release Date: July 30, 2013
- 51 -
Revision J
7.2.32
Read Manufacturer / Device ID Dual I/O (92h)
The Manufacturer / Device ID Dual I/O instruction is an alternative to the Read Manufacturer/Device ID
instruction that provides both the JEDEC assigned manufacturer ID and the specific device ID at 2x
speed.
The Read Manufacturer / Device ID Dual I/O instruction is similar to the Fast Read Dual I/O instruction.
The inst
ruction is initiated by driving the /CS pin low and shifting the instruction code “92h” followed by a
24-bit address (A23-A0) of 000000h, 8-bit Continuous Read Mode Bits, with the capability to input the
Address bits two bits per clock. After which, the Manufacturer ID for Winbond (EFh) and the Device ID
are shifted out 2 bits per clock on the falling edge of CLK with most significant bits (MSB) first as shown in
figure 30. The Device ID values for the W25Q80BW is listed in Manufacturer and Device Identification
table. If the 24-bit address is initially set to 000001h the Device ID will be read first and then followed by
the Manufacturer ID. The Manufacturer and Device IDs can be read continuously, alternating from one to
the other. The instruction is completed by driving /CS high.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (92h)
High Impedance
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
7
5
3
1
*
*
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
23
*
*
A23-16
A15-8
A7-0 (00h)
M7-0
/CS
CLK
DI
(IO
0)
DO
(IO
1)
24
25
26
27
28
29
30
31
32
33
34
36
37
38
35
23
0
Mode 0
Mode 3
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
6
4
2
1
0
1
MFR ID
Device ID
MFR ID
(repeat)
Device ID
(repeat)
IOs switch from
Input to Output
*
*
*
*
= MSB
*
Figure 30. Read Manufacturer / Device ID Dual I/O Diagram
Note:
The “Continuous Read Mode” bits M7-0 must be set to Fxh to be compatible with Fast Read Dual I/O instruction.


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