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ADN4661BRZ-REEL7 Datasheet(PDF) 1 Page - Analog Devices |
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ADN4661BRZ-REEL7 Datasheet(HTML) 1 Page - Analog Devices |
1 / 12 page Single, 3 V, CMOS, LVDS, High Speed Differential Driver ADN4661 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. FEATURES ±15 kV ESD protection on output pins 600 Mbps (300 MHz) switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay 3.3 V power supply ±355 mV differential signaling Low power dissipation: 23 mW typical Interoperable with existing 5 V LVDS receivers Conforms to TIA/EIA-644 LVDS standards Industrial operating temperature range (−40°C to +85°C) Available in surface-mount (SOIC) package APPLICATIONS Backplane data transmission Cable data transmission Clock distribution FUNCTIONAL BLOCK DIAGRAM ADN4661 VCC DIN DOUT+ DOUT– GND NC NC NC NC = NO CONNECT Figure 1. GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1 mA for driving a transmission medium such as a twisted- pair cable. The transmitted signal develops a differential voltage of typically ±355 mV across a termination resistor at the receiv- ing end, and this is converted back to a TTL/CMOS logic level by a line receiver. The ADN4661 and a companion LVDS receiver offer a new solution to high speed point-to-point data transmission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL). |
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