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ADG1209YCPZ-REEL1 Datasheet(PDF) 8 Page - Analog Devices |
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ADG1209YCPZ-REEL1 Datasheet(HTML) 8 Page - Analog Devices |
8 / 20 page ADG1208/ADG1209 Rev. B | Page 8 of 20 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 EN 9 VSS S1 S4 S3 S2 A0 A2 GND VDD S7 S6 S5 A1 ADG1208 TOP VIEW (Not to Scale) DS8 PIN 1 INDICATOR 1 Figure 3. ADG1208 Pin Configuration (TSSOP/SOIC) VSS 2 S1 3 S2 4 S3 11 VDD 12 GND 10 S5 9S6 TOP VIEW (Not to Scale) ADG1208 Figure 4. ADG1208 Pin Configuration (LFCSP_VQ), Exposed Pad Tied to Substrate, VSS Table 4. ADG1208 Pin Function Descriptions Pin Number TSSOP/SOIC LFCSP_VQ Mnemonic Description 1 15 A0 Logic Control Input. 2 16 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. 3 1 VSS Most Negative Power Supply Potential. In single-supply applications, it can be connected to ground. 4 2 S1 Source Terminal 1. Can be an input or an output. 5 3 S2 Source Terminal 2. Can be an input or an output. 6 4 S3 Source Terminal 3. Can be an input or an output. 7 5 S4 Source Terminal 4. Can be an input or an output. 8 6 D Drain Terminal. Can be an input or an output. 9 7 S8 Source Terminal 8. Can be an input or an output. 10 8 S7 Source Terminal 7. Can be an input or an output. 11 9 S6 Source Terminal 6. Can be an input or an output. 12 10 S5 Source Terminal 5. Can be an input or an output. 13 11 VDD Most Positive Power Supply Potential. 14 12 GND Ground (0 V) Reference. 15 13 A2 Logic Control Input. 16 14 A1 Logic Control Input. Table 5. ADG1208 Truth Table A2 A1 A0 EN On Switch X X X 0 None 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 |
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