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PIC24FJ256GB110 Datasheet(PDF) 4 Page - Microchip Technology |
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PIC24FJ256GB110 Datasheet(HTML) 4 Page - Microchip Technology |
4 / 328 page PIC24FJ256GB110 FAMILY DS39897B-page 2 Preliminary © 2008 Microchip Technology Inc. Peripheral Features: • Peripheral Pin Select: - Allows independent I/O mapping of many peripherals at run time - Continuous hardware integrity checking and safety interlocks prevent unintentional configuration changes - Up to 44 available pins (100-pin devices) • Three 3-Wire/4-Wire SPI modules (supports 4 Frame modes) with 8-Level FIFO Buffer • Three I2C™ modules support Multi-Master/Slave modes and 7-Bit/10-Bit Addressing • Four UART modules: - Supports RS-485, RS-232, LIN/J6202 protocols and IrDA® - On-chip hardware encoder/decoder for IrDA - Auto-wake-up and Auto-Baud Detect (ABD) - 4-level deep FIFO buffer • Five 16-Bit Timers/Counters with Programmable Prescaler • Nine 16-Bit Capture Inputs, each with a Dedicated Time Base • Nine 16-Bit Compare/PWM Outputs, each with a Dedicated Time Base • 8-Bit Parallel Master Port (PMP/PSP): - Up to 16 address pins - Programmable polarity on control lines • Hardware Real-Time Clock/Calendar (RTCC): - Provides clock, calendar and alarm functions • Programmable Cyclic Redundancy Check (CRC) Generator • Up to 5 External Interrupt Sources Special Microcontroller Features: • Operating Voltage Range of 2.0V to 3.6V • Self-Reprogrammable under Software Control • 5.5V Tolerant Input (digital pins only) • Configurable Open-Drain Outputs on Digital I/O • High-Current Sink/Source (18 mA/18 mA) on all I/O • Selectable Power Management modes: - Sleep, Idle and Doze modes with fast wake-up • Fail-Safe Clock Monitor Operation: - Detects clock failure and switches to on-chip, low-power RC oscillator • On-Chip LDO Regulator • Power-on Reset (POR), Power-up Timer (PWRT), Low-Voltage Detect (LVD) and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with On-Chip. Low-Power RC Oscillator for Reliable Operation • In-Circuit Serial Programming™ (ICSP™) and In-Circuit Debug (ICD) via 2 Pins • JTAG Boundary Scan and Programming Support • Brown-out Reset (BOR) • Flash Program Memory: - 10,000 erase/write cycle endurance (minimum) - 20-year data retention minimum - Selectable write protection boundary - Write protection option for Flash Configuration Words |
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