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MP20042DG-JG-LF-Z Datasheet(PDF) 7 Page - Monolithic Power Systems |
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MP20042DG-JG-LF-Z Datasheet(HTML) 7 Page - Monolithic Power Systems |
7 / 9 page MP20042-DUAL, LOW NOISE, HIGH PSRR, 200mA LINEAR REGULATOR MP20042 Rev. 0.9 www.MonolithicPower.com 7 9/28/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. APPLICATION INFORMATION Power Dissipation The power dissipation for any package depends on the thermal resistance of the case and circuit board, the temperature difference between the junction and ambient air, and the rate of airflow. The power dissipation across the device can be represented by the equation: P = (VIN - VOUT) ×IOUT The allowable power dissipation can be calculated using the following equation: P(MAX) = (TJunction - TAmbient) / θJA Where (TJunction - TAmbient) is the temperature difference between the junction and the surrounding environment, θJA is the thermal resistance from the junction to the ambient environment. Connect the GND pin of MP20042 to ground using a large pad or ground plane helps to channel heat away. Input Capacitor Selection Using a capacitor whose value is >0.47µF on the MP20042 input and the amount of capacitance can be increased without limit. Larger values will help improve line transient response with the drawback of increased size. Ceramic capacitors are preferred, but tantalum capacitors may also suffice. Output Capacitor Selection The MP20042 is designed specifically to work with very low ESR ceramic output capacitor in space-saving and performance consideration. A ceramic capacitor in the range of 0.47µF and 10µF, and with ESR lower than 1.2Ω is suitable for the MP20042 application circuit. Output capacitor of larger values will help to improve load transient response and reduce noise with the drawback of increased size. LOAD CURRENT (mA) Unstable Stable 0.1 1 10 100 0 40 80 120 160 200 Figure 2—Relationship between ESR and LDO Stability Reverse Current Path The PMOS used in the MP20042 has an inherent diode connected between input and output (see Figure3). If VOUT - VIN is more than a diode-drop, this diode gets forward biased and starts to conduct. To avoid misoperation, an external Schottky connected in parallel with the internal parasitic diode prevents it from being turned on by limiting the voltage drop across it to about 0.3V (see Figure 4). Figure 3—Inherent Diode Connected between Each Regulator Input and Output Figure 4—External Schottky Diode Connected in Parallel with the Internal Parasitic Diode |
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