MP18024―100V, 4A HIGH FREQUENCY HALF-BRIDGE GATE DRIVER

MP18024 Rev. 1.0

www.MonolithicPower.com

2

6/3/2011

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2011 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number*

Package

Top Marking

MP18024HN

SOIC8E

MP18024HN

* For Tape & Reel, add suffix –Z (e.g. MP18024HN–Z);

For RoHS compliant packaging, add suffix –LF; (e.g. MP18024HN–LF–Z)

PACKAGE REFERENCE

VDD

BST

DRVH

SW

DRVL

VSS

INL

INH

1

2

3

4

8

7

6

5

TOP VIEW

BST to SW ....................................-0.3V to +18V

DRVH to SW............. -0.3V to (BST-SW) + 0.3V

DRVL to VSS ...................-0.3V to (VDD + 0.3V)

Continuous Power Dissipation

(2)

............................................................. 2.6W

Junction Temperature...............................150

C

Lead Temperature ....................................260

C

Storage Temperature............... -65°C to +150

C

Recommended Operating Conditions

(3)

SW Slew Rate....................................... <50V/ns

Thermal Resistance

(4)

SOIC8E .................................. 48 ...... 10...

C/W

Notes:

1) Exceeding these ratings may damage the device.

2) The maximum allowable power dissipation is a function of the

will cause excessive die temperature, and the regulator will go

into thermal shutdown. Internal thermal shutdown circuitry

protects the device from permanent damage.

3) The device is not guaranteed to function outside of its

operating conditions.

4) Measured on JESD51-7, 4-layer PCB.