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MP8670DN Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP8670DN Datasheet(HTML) 3 Page - Monolithic Power Systems |
3 / 15 page MP8670 – 6A, 30V, 420KHZ STEP-DOWN WITH SYNCHRONIZABLE GATE DRIVER MP8670 Rev. 1.3 www.MonolithicPower.com 3 4/4/2011 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP8670DN SOIC8E MP8670DN –40 °C to +85°C * For Tape & Reel, add suffix –Z (eg. MP8670DN–Z). For RoHS Compliant Packaging, add suffix –LF (eg. MP8670DN–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN ....................................... 32V VSW...................... –0.3V (–5V for < 10ns) to 33V VBST – VSW ................................................... 6.5V All Pins...........................................–0.3V to +6V Continuous Power Dissipation (TA = +25°C) (2) ……………………………………………......2.5W Junction Temperature...............................150 °C Lead Temperature ....................................260 °C Storage Temperature.............. –65 °C to +150°C Recommended Operating Conditions (3) Supply Voltage VIN ...........................4.5V to 30V Operating Junction Temperature–40 °C to +125°C Thermal Resistance (4) θJA θJC SOIC8E .................................. 50 ...... 10... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. SW BST VCC BG IN EN/SYNC FB GND 1 2 3 4 8 7 6 5 TOP VIEW EXPOSED PAD ON BACKSIDE |
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