AKD8181B

【Pattern A】

※Composition at the time of shipment

NC：No components

※RTT: 50Ω is mounted at the time of shipment

【Pattern B】

Power

There are the following three power supplies.

※If you have configured a termination circuit with resistor only (Pattern A or B), it becomes possible to

evaluate even without applying power to the VDD-2V terminal.

- VDD

- VEE

- VDD-2V

Clock input

AK8181B inputs the clock selected by CLK_SEL switch. (External input or crystal)

The clock input signal can terminate at 50Ω if needed. (50Ω is connected to R2 pattern)

Inputs 266MHz or less.

Output load circuit

It can terminate by the following three methods. (Pattern A/B/C)

The state of initial shipment is 【Pattern A】.

The core power supply of AK8181B (3.3V)

The core power supply of AK8181B (GND)

Power supply for the end of the output load resistor (=VDD-2V)

Note) GND of the SMA terminal is connected to the VEE inside the substrate.

Q0,1,2,3

Q0N,1N,

2N,3N

50

Ω

50

Ω

NC

NC





0

2

)

2

/(

)

(

1

Z

V

V

V

RTT

CC

OL

OH





















Zo=50

Ω

Zo=50

Ω

Q0,1,2,3

Q0N,1N,

2N,3N

0

Ω

0

Ω

0.1uF

or Open

RTT

84

Ω

84

Ω

Zo=50

Ω

Zo=50

Ω

0

Ω

0

Ω

short

125

Ω

125

Ω

AKD8181B-E-00

2

2012/7