5

IXDI514 / IXDN514

Pin Description

CAUTION: Follow proper ESD procedures when handling and assembling this component.

1) The

θ

resistance of the package, and the IXD_5XX are typical. The values for these packages are natural convection values with vertical boards

and the values would be lower with natural convection. For the 6-Lead DFN package, the

θ

on a PCB. The

θ

to the die, it is easy to reduce the

θ

easily, and potentially even lower. The

θ

construction, layout, materials, etc. This typical range tells the user what he is likely to get if he does no thermal management.

2)

θ

published for the PDIP and SOIC packages. The

θ

the die attach pad on the back of the DFN, -- and a guardband has been added to be safe.

3) The

θ

The value must be typical because there are a variety of thermal substrates. This value was calculated based on easily available IMS in the

U.S. or Europe, and not a premium Japanese IMS. A 4 mil dialectric with a thermal conductivity of 2.2W/mC was assumed. The result was

given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the

DFNpackage.

SYMBOL

FUNCTION

DESCRIPTION

VCC

Supply Voltage

Positive power-supply voltage input. This pin provides power to the

entire chip. The range for this voltage is from 4.5V to 30V.

IN

Input

Input signal-TTL or CMOS compatible.

OUT

Output

Driver Output. For application purposes, this pin is connected,

through a resistor, to Gate of a MOSFET/IGBT.

GND

Ground

The system ground pin. Internally connected to all circuitry, this pin

provides ground reference for the entire chip. This pin should be

connected to a low noise analog ground plane for optimum

performance.

Figure 3 - Characteristics Test Diagram

0V

5.0V

0V

Vcc

IXDI414

IXDN414

0V

Vcc

Agilent 1147A

Current Probe

15nF

10uF

25V

IXDI514

IXDN514

2500 pf