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PIC16C56T Datasheet(PDF) 11 Page - Microchip Technology |
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PIC16C56T Datasheet(HTML) 11 Page - Microchip Technology |
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11 / 194 page  © 2002 Microchip Technology Inc. Preliminary DS30453D-page 9 PIC16C5X 3.0 ARCHITECTURAL OVERVIEW The high performance of the PIC16C5X family can be attributed to a number of architectural features com- monly found in RISC microprocessors. To begin with, the PIC16C5X uses a Harvard architecture in which program and data are accessed on separate buses. This improves bandwidth over traditional von Neumann architecture where program and data are fetched on the same bus. Separating program and data memory further allows instructions to be sized differently than the 8-bit wide data word. Instruction opcodes are 12 bits wide making it possible to have all single word instructions. A 12-bit wide program memory access bus fetches a 12-bit instruction in a single cycle. A two- stage pipeline overlaps fetch and execution of instruc- tions. Consequently, all instructions (33) execute in a single cycle except for program branches. The PIC16C54/CR54 and PIC16C55 address 512 x 12 of program memory, the PIC16C56/CR56 address 1K x 12 of program memory, and the PIC16C57/CR57 and PIC16C58/CR58 address 2K x 12 of program memory. All program memory is internal. The PIC16C5X can directly or indirectly address its register files and data memory. All special function reg- isters including the program counter are mapped in the data memory. The PIC16C5X has a highly orthogonal (symmetrical) instruction set that makes it possible to carry out any operation on any register using any addressing mode. This symmetrical nature and lack of ‘special optimal situations’ make programming with the PIC16C5X simple yet efficient. In addition, the learning curve is reduced significantly. The PIC16C5X device contains an 8-bit ALU and work- ing register. The ALU is a general purpose arithmetic unit. It performs arithmetic and Boolean functions between data in the working register and any register file. The ALU is 8 bits wide and capable of addition, subtrac- tion, shift and logical operations. Unless otherwise mentioned, arithmetic operations are two's comple- ment in nature. In two-operand instructions, typically one operand is the W (working) register. The other operand is either a file register or an immediate con- stant. In single operand instructions, the operand is either the W register or a file register. The W register is an 8-bit working register used for ALU operations. It is not an addressable register. Depending on the instruction executed, the ALU may affect the values of the Carry (C), Digit Carry (DC), and Zero (Z) bits in the STATUS register. The C and DC bits operate as a borrow and digit borrow out bit, respec- tively, in subtraction. See the SUBWF and ADDWF instructions for examples. A simplified block diagram is shown in Figure 3-1, with the corresponding device pins described in Table 3-1 (for PIC16C54/56/58) and Table 3-2 (for PIC16C55/ 57). |
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