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LY651024RL-20LL Datasheet(PDF) 2 Page - Lyontek Inc. |
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LY651024RL-20LL Datasheet(HTML) 2 Page - Lyontek Inc. |
2 / 13 page LY651024 Rev. 1.1 128K X 8 BIT HIGH SPEED CMOS SRAM Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1 ® FEATURES Fast access time : 20ns Low power consumption: Operating current : 30mA (TYP.) Standby current : 2 μA (TYP.) Single 5V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data retention voltage : 2.0V (MIN.) Green package available Package : 32-pin 300 mil SOJ 32-pin 8mm x 20mm TSOP-I 32-pin 8mm x 13.4mm STSOP GENERAL DESCRIPTION The LY651024 is a 1,048,576-bit low power CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY651024 is well designed for very high speed system applications, and particularly well suited for battery back-up nonvolatile memory application. The LY651024 operates from a single power supply of 3V~5V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Family Operating Temperature Vcc Range Speed Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.) LY651024(LL) 0 ~ 70℃ 4.5 ~ 5.5V 20ns 2µA 30mA LY651024(LLI) -40 ~ 85℃ 4.5 ~ 5.5V 20ns 2µA 30mA FUNCTIONAL BLOCK DIAGRAM DECODER I/O DATA CIRCUIT CONTROL CIRCUIT 128Kx8 MEMORY ARRAY COLUMN I/O A0-A16 Vcc Vss DQ0-DQ7 CE# WE# OE# CE2 PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A16 Address Inputs DQ0 – DQ7 Data Inputs/Outputs CE#, CE2 Chip Enable Inputs WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground NC No Connection PIN CONFIGURATION |
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