AK4705AEQ datasheet(8/34 Pages) AKM

Part #	AK4705AEQ

Description	AK4705A Evaluation Board Rev.0

Download	34 Pages

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Manufacturer	AKM [Asahi Kasei Microsystems]

Direct Link	http://www.akm.com

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8 / 34 page

[AKD4705A-A]

2007/09

- 8 -

DIP-switch (S1) List

No.

Switch

Name

Default

Function

1

CM0

OFF

S/P DIF mode (Refer the evaluation mode)

2

DIF2

ON

3

DIF0

ON

24 bit I2S mode (Refer the evaluation mode)

4

-

OFF

(Reserved)

5

-

OFF

(Reserved)

Table 5. DIP-switch list (DIF1=“L”)

Jumper List

No.

Jumper Name

Function

1

EXT

MCLK source set-up when CM0=”H”.

Open: X’tal (Default).

Short: External clock via BNC (J1). Remove the on-board X’tal.

2,3,

4,5

MCLK, BICK,

LRCK, SDTI

Clock source set-up

Short: Connect the DIR (AK4112B). (Default)

Open: Separate the DIR. Supply clocks via Port1.

6

RX

S/PDIF’s port set-up when CM0=”L”.

TORX: Optical connector PORT2. (Default)

BNC: BNC connector J2.

7

GND

Analog ground and digital ground

Open: separated (Default).

Short: connected (The connector “DGND” can be open.).

8

D-A

Power supply source set-up for digital section of AKD4705A-A.

Open: from the “D5V” Jack.

Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “D5V” Jack. (Default)

9

REG

Power supply source set-up for VD of AK4705A.

Open: from the “+5V” Jack.

Short: from the regulator. Don’t connect anything the “+5V” Jack. (Default)

10

VVD1

Power supply source set-up for VVD1 of AK4705A.

Open: from the “VVD1” Jack.

Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “VVD1” Jack. (Default)

11

VVD2

Power supply source set-up for VVD1 of AK4705A.

Open: from the “VVD2” Jack.

Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “VVD2” Jack. (Default)

12

VCRRC

Input Selection for VCRRC

“I” side: Input to VCRRC from VCRRC jack. (Default)

“I/O” side: Input to VCRC from VCRC jack.

(Note: Refer CIO bit of AK4705A)

Table 6. Jumper list

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