LY61L2568A_12 datasheet(5/11 Pages) LYONTEK

Part #	LY61L2568A

Description	256K X 8 BIT HIGH SPEED CMOS SRAM

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Manufacturer	LYONTEK [Lyontek Inc.]

Direct Link	http://www.lyontek.com.tw

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LY61L2568A

Rev. 1.0

256K X 8 BIT HIGH SPEED CMOS SRAM

Lyontek Inc. reserves the rights to change the specifications and products without notice.

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

4

®

CAPACITANCE (TA = 25℃, f = 1.0MHz)

PARAMETER

SYMBOL

MIN.

MAX

UNIT

Input Capacitance

CIN

-

8

pF

Input/Output Capacitance

CI/O

-

10

pF

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Speed

8/10/12ns

Input Pulse Levels

0.2V to VCC -0.2V

Input Rise and Fall Times

3ns

Input and Output Timing Reference Levels

1.5V

Output Load

CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM.

LY61L2568A-8

LY61L2568A-10 LY61L2568A-12

UNIT

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Read Cycle Time

tRC

8

-

10

-

12

-

ns

Address Access Time

tAA

-

8

-

10

-

12

ns

Chip Enable Access Time

tACE

-

8

-

10

-

12

ns

Output Enable Access Time

tOE

-

4.5

-

4.5

-

5

ns

Chip Enable to Output in Low-Z

tCLZ*

2

-

2

-

3

-

ns

Output Enable to Output in Low-Z tOLZ*

0

-

0

-

0

-

ns

Chip Disable to Output in High-Z

tCHZ*

-

3

-

4

-

5

ns

Output Disable to Output in High-Z tOHZ*

-

3

-

4

-

5

ns

Output Hold from Address Change tOH

2

-

2

-

2

-

ns

(2) WRITE CYCLE

PARAMETER

SYM.

LY61L2568A-8

LY61L2568A-10 LY61L2568A-12

UNIT

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Write Cycle Time

tWC

8

-

10

-

12

-

ns

Address Valid to End of Write

tAW

6.5

-

8

-

10

-

ns

Chip Enable to End of Write

tCW

6.5

-

8

-

10

-

ns

Address Set-up Time

tAS

0-

0-0

-

ns

Write Pulse Width

tWP

6.5

-

8

-

10

-

ns

Write Recovery Time

tWR

0-

0-0

-

ns

Data to Write Time Overlap

tDW

5-

6-7

-

ns

Data Hold from End of Write Time tDH

0-

0-0

-

ns

Output Active from End of Write

tOW*

2-

2-2

-

ns

Write to Output in High-Z

tWHZ*

-3-4-

5

ns

*These parameters are guaranteed by device characterization, but not production tested.

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