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A6812 Datasheet(PDF) 3 Page - Allegro MicroSystems

Part # A6812
Description  DABiC-IV, 20-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A6812 Datasheet(HTML) 3 Page - Allegro MicroSystems

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6812
20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
www.allegromicro.com
FUNCTIONAL BLOCK DIAGRAM
TRUTH TABLE
Serial
Shift Register Contents
Serial
Latch Contents
Output Contents
Data
Clock
Data
Strobe
Input
Input I1
I2
I3
...
IN-1 IN
Output
Input
I1
I2
I3
...
IN-1 IN Blanklng
I1 I2 I3 ... IN-1 IN
HH
R1 R2 ...
RN-2 RN-1
RN-1
LL
R1 R2 ...
RN-2 RN-1
RN-1
XR1 R2 R3 ...
RN-1 RN
RN
XXX...
X
X
X
L
R1 R2 R3 ...
RN-1 RN
P1 P2 P3 ...
PN-1 PN
PN
HP1 P2 P3 ...
PN-1 PN
LP1 P2 P3 ... PN-1 PN
X
X
X
...
X
X
H
L
L
L
... L
L
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
MOS
BIPOLAR
OUT 1 OUT 2
GROUND
Dwg. FP-013-1
OUT 3
OUT N
CLOCK
SERIAL
DATA IN
STROBE
BLANKING
SERIAL
DATA OUT
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
VDD
VBB
LOGIC
SUPPLY
LOAD
SUPPLY


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