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A6818EA Datasheet(PDF) 1 Page - Allegro MicroSystems |
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A6818EA Datasheet(HTML) 1 Page - Allegro MicroSystems |
1 / 7 page DABiC-IV, 32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER The A6818– devices combine a 32-bit CMOS shift register, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and - 40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6818– features an increased data input rate (compared with the older UCN/UCQ5818–F) and a controlled output slew rate. The CMOS shift register and latches allow direct interfacing with micro- processor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz. A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are available as the A6810– (10 bits) and A6812– (20 bits). The A6818– output source drivers are npn Darlingtons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromag- netic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emis- sions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA. Three temperature ranges are available for optimum performance in commercial (suffix S-), industrial (E-), and extended industrial (K-) applica- tions. The package style provided is the minimum-area surface-mount PLCC (suffix -EP). Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow these devices to drive most multiplexed vacuum-fluorescent displays over the maximum operating temperature range. The lead (Pb) free versions have 100% matte tin leadframe plating. FEATURES ■ Controlled Output Slew Rate ■ High-Speed Data Storage ■ 60 V Minimum ■ High Data Input Rate Output Breakdown ■ Low Output-Saturation Voltages ■ PNP Active Pull-Downs ■ Improved Replacements ■ Low-Power CMOS Logic for SN75518N, SN75518NF, and Latches UCN5818–, and UCQ5818– ABSOLUTE MAXIMUM RATINGS at TA = 25°C Logic Supply Voltage, VDD .................. 7.0 V Driver Supply Voltage, VBB ................... 60 V Continuous Output Current Range, IOUT ......................... -40 mA to +15 mA Input Voltage Range, VIN ....................... -0.3 V to VDD + 0.3 V Package Power Dissipation, PD ........................................ See Graph Operating Temperature Range, TA (Suffix ‘E–’) .................. -40°C to +85°C (Suffix ‘K–’) ................ -40°C to +125°C (Suffix ‘S–’) .................. -20°C to +85°C Storage Temperature Range, TS ............................... -55°C to +125°C Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage if exposed to extremely high static electrical charges. A6818xEP 6818 12 13 14 15 16 17 10 11 9 8 7 35 34 33 32 31 36 37 38 39 29 30 Part Number Pb-free Packing Ambient Temperature, TA (°C) A6818EEP – 27 pieces/tube A6818EEP-T Yes –40 to 85 A6818EEPTR – 450 pieces/13-in. reel A6818EEPTR-T Yes A6818KEP – 27 pieces/tube A6818KEP-T Yes –40 to 125 A6818KEPTR – 450 pieces/13-in. reel A6818KEPTR-T Yes A6818SEP – 27 pieces/tube A6818SEP-T Yes –20 to 85 A6818SEPTR – 450 pieces/13-in. reel A6818SEPTR-T Yes Always order by complete part number: |
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