TAB IS GND

DCQ PACKAGE

SOT223

(TOP VIEW)

5

IN

OUT

GND

NR

EN

DBV PACKAGE

SOT23

(TOP VIEW)

IN

GND

EN

3

NR

OUT

1

2

5

4

IN

N/C

N/C

EN

8

7

6

5

OUT

N/C

NR

GND

1

2

3

4

DRB PACKAGE

3mm x 3mm SON

(TOP VIEW)

4

3

6

2

1

TPS736xx-Q1

SLVSC36 – JUNE 2013

www.ti.com

PIN CONFIGURATIONS

PIN DESCRIPTIONS

SOT23

SOT223

3 × 3 SON

(DBV)

(DCQ)

(DRB)

NAME

PIN NO.

PIN NO.

PIN NO.

DESCRIPTION

IN

1

1

8

Input supply

GND

2

3, 6

4, Pad

Ground

Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the

regulator into shutdown mode. Refer to the ENABLE PIN AND SHUTDOWN

EN

3

5

5

section under APPLICATION INFORMATION for more details. Connect EN to IN

when not in use.

Fixed voltage versions only—connecting an external capacitor to this pin bypasses

NR

4

4

3

noise generated by the internal bandgap, reducing output noise to very low levels.

OUT

5

2

1

Output of the Regulator. There are no output capacitor requirements for stability.

6

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