TPS62740

SLVSB02A – NOVEMBER 2013 – REVISED NOVEMBER 2013

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PACKAGE

PART NUMBER

Output Voltage setting VSEL 1 - 4

MARKING

TPS62740

1.8V to 3.3V in 100mV steps

TPS62740DSS

62740

–40°C to 85°C

1.3V to 2.8V in 100mV steps

-/-

-/-

(1)

The DSS package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel, T suffix for 250 parts per reel.

(2)

Device option, contact TI for more details

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

MIN

MAX

VIN

- 0.3

6

V

- 0.3

V

EN, CTRL, VSEL1-4

- 0.3

V

PG

- 0.3

V

VOUT, LOAD

- 0.3

3.7

V

PG pin

sink current

10

mA

HBM Human body model

2

kV

CDM Charge device model

1

- 40

150

°C

- 65

150

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2)

All voltage values are with respect to network ground terminal GND.

(3)

(4)

The human body model is a 100-pF capacitor discharged through a 1.5-k

Ω resistor into each pin.

THERMAL INFORMATION

DSS / 12 PINS

UNITS

Junction-to-ambient thermal resistance

61.8

Junction-to-case (top) thermal resistance

70.9

Junction-to-board thermal resistance

25.7

°C/W

Junction-to-top characterization parameter

1.9

Junction-to-board characterization parameter

25.7

Junction-to-case (bottom) thermal resistance

7.2

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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