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TPS54625PWPR Datasheet(PDF) 5 Page - Texas Instruments |
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TPS54625PWPR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 22 page POWER PAD TPS54625 PWP HTSSOP14 SW1 VBST SS VO VFB GND PGND1 14 7 5 6 2 3 4 1 VIN2 EN PG VREG5 13 12 11 9 8 PGND2 10 SW2 VIN1 PWP PACKAGE (TOP VIEW) TPS54625 www.ti.com SLVSC33 – AUGUST 2013 DEVICE INFORMATION PIN FUNCTIONS PIN DESCRIPTION NAME NUMBER VO 1 Connect to output of converter. This pin is used for output discharge function. VFB 2 Converter feedback input. Connect with feedback resistor divider. 5.5V power supply output. An external capacitor (typical 1uF) should be connected to GND. VREG5 is not VREG5 3 active when EN is low. SS 4 Soft start control. An external capacitor should be connected to GND. GND 5 Signal ground pin. PG 6 Open drain power good output EN 7 Enable control input. EN is active high and must be pulled up to enable the device. PGND1, Ground returns for low-side MOSFET. Also serve as inputs of current comparators. Connect PGND and 8, 9 PGND2 GND strongly together near the IC. Switch node connection between high-side NFET and low-side NFET. Also serve as inputs to current SW1,SW2 10, 11 comparator. Supply input for high-side NFET gate driver (boost terminal). Connect capacitor from this pin to respective VBST 12 SW1, SW2 terminals. An internal PN diode is connected between VREG5 and VBST pin. Power Input and connected to high side NFET drain. Supply Input for 5V internal linear regulator for the VIN1, VIN2 13, 14 control circuitry Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be connected to PowerPAD™ Back side PGND Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS54625 |
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