5817

ADDRESSABLE

28-LINE DECODER/DRIVER

Discontinued

Product

Shown

For

Reference

Only

Replaced

by

A6817SEP

.

7

8

9

10

11

12

13

14

15

16

17

29

30

39

38

37

36

35

34

33

32

31

Dwg. PP-050

GND

IC

GND

OUTA9

OUTA8

OUTA7

OUTA6

OUTA5

OUTA4

OUTA3

OUTA2

OUTA1

OUTA0

OUTB1

OUTB2

OUTB3

OUTB4

OUTB5

OUTB6

OUTB7

OUTB8

OUTB9

Always order by complete part number: A5817SEP .

ADDRESSABLE

28-LINE DECODER/DRIVER

ABSOLUTE MAXIMUM RATINGS

at T

Output Voltage, V

Logic Supply Voltage, V

Input Voltage Range,

V

Output Current, I

Package Power Dissipation, P

Operating Temperature Range,

T

Storage Temperature Range,

T

-55

*Derate at rate of 22 mW/

°C above T

Caution: CMOS devices have input static

protection but are susceptible to damage

when exposed to extremely high static

electrical charges.

5817

Intended for use in ink-jet printer applications, the A5817SEP

addressable 28-line decoder/driver combines low-power CMOS inputs

and logic with 28 high-current, high-voltage bipolar outputs. A 4-to-14

line decoder determines the selected output driver (n) in each

14-driver bank. Two independent output enable inputs (active low)

then provide the final decoding to activate 1- or 2-of-28 outputs

time of manufacture to adjust the output pulse timing and thereby the

energy the device delivers to the ink-jet print head.

The CMOS inputs cause minimal loading and are compatible with

standard CMOS, PMOS, and NMOS logic. Use with TTL or DTL

circuits may require appropriate pull-up resistors to ensure an input

logic high. The internal CMOS logic operates from a 5 V supply.

A CHIP ENABLE function is provided to lock out the drivers during

system power up. The 28 bipolar power outputs are open-collector

30 V Darlington drivers capable of sinking 500 mA at ambient

temperatures up to 85

°C.

The A5817SEP is furnished in a 44-lead plastic chip carrier

(quad pack) for minimum-area, surface-mount applications.

FEATURES

s Controlled Characteristics for Ink-Jet Printers

s Addressable Data Entry

s CMOS, PMOS, NMOS Compatible Inputs

s Low-Power CMOS Logic